Microprocessor Week 9: Timer and Counter

MICROCONTROLLER MCS-51: TIMER / COUNTER Arkhom JODTANG Civil Aviation Training Center

Timer / Counter Contents  Timer and Counter  Timer Register  Timer Mode  Timer Mode 1  Sample: Daley Programming  Sample: Pulse generation programming 2

MCS51 Timer / Counter  The 8051 has two timers/counters are Timer 0 and Timer 1  Both of them can be used either as timers to generate a time delay or as counters to count events from external signal coming to microcontroller.  By Set interval value, enable timer to start running while monitoring overflow bit to know the completion interval. 3

Timer Register 4  TMOD (Timer operation Mode) register  TCON (Timer Control) register  THx Register (TH1 for Timer 1, TH0 for Timer 0)  TLx Register (TL1 for Timer 1, TL0 for Timer 0)

Mode 1 Equivalent circuit 5 Modified from http://blog.circuits4you.com/2015/07/programming-timers-on-8051.html / 12 THx TLx Clock Gen. Machine Cycle

TMOD (Timer operation Mode) register 6  Gate:  “0” : enable timer by TRx bit  “1” : enable timer by TRx bit with external signal at pin INTx  C/T: Counter and Timer selector  1 for Count signal from Tx Pin (Counter)  0 for Count internal clock signal (Timer)  M1: Mode bit 1 (MSB)  M0: Mode bit 0 (LSB) TMOD Timer 1 Timer 0 Gate C/T M1 M0 Gate C/T M1 M0 0 0 0 1 0 0 0 0

Mode of Operation 8  Mode 0: 13-bits  THx (8-bits) and TLx (5-bits) combine as 13-bits register  Mode 1: 16-bits  THx and TLx combine as 16-bits register  Mode 2: 8-bit Auto reload  THx is master value of TLx Gate C/T M1 M0 Gate C/T M1 M0 0 1 1 0

Setting Mode Operation 9 Gate C/T M1 M0 Gate C/T M1 M0 0 1 0 1 Setting mode of operation by assign appropriate value to TMOD register  Timer 1 Mode 1  MOV TMOD, #00010000B  MOV TMOD, #10H  Timer 0 Mode 1  MOV TMOD, #00000001B  MOV TMOD, #01H

Example 9.1 10 TMOD Gate C/T M1 M0 Gate C/T M1 M0 x x x x x x x x Find the value for TMOD if we want to program Timer 0 in mode 1, count from internal clock source, and use instructions to start and stop the timer. Timer 1 in mode 2, count from external and start counting by instruction. 01100001

Mode 1 Equivalent circuit 11 Modified from http://blog.circuits4you.com/2015/07/programming-timers-on-8051.html / 12 THx TLx Clock Gen. Machine Cycle

Example 9.1 12 TMOD Timer 1 Timer 0 Gate C/T M1 M0 Gate C/T M1 M0 0 0 0 0 x x x x Find the value for TMOD if we want to program Timer 0 in mode 1, count from internal clock source, and use instructions to start and stop the timer. Solution:  Timer 0, So, we care only Timer 0 Nibble

Example 9.1 13 TMOD Timer 1 Timer 0 Gate C/T M1 M0 Gate C/T M1 M0 0 0 0 0 x x 0 1 Find the value for TMOD if we want to program Timer 0 in mode 1, count from internal clock source, and use instructions to enable the timer. Solution:  Timer 0: So, we care only Timer 0 Nibble  Mode 1: M1 = 0, M0 = 1

Example 9.1 14 TMOD Timer 1 Timer 0 Gate C/T M1 M0 Gate C/T M1 M0 0 0 0 0 x 0 0 1 Find the value for TMOD if we want to program Timer 0 in mode 1, count from internal clock source, and use instructions to enable the timer. Solution:  Timer 0: So, we care only Timer 0 Nibble  Mode 1: M1 = 0, M0 = 1  Internal Clock: That mean Timer. So, C/T = 0

Example 9.1 15 TMOD Timer 1 Timer 0 Gate C/T M1 M0 Gate C/T M1 M0 0 0 0 0 0 0 0 1 Find the value for TMOD if we want to program Timer 0 in mode 1, count from internal clock source, and use instructions to enable the timer. Solution:  Timer 0: So, we care only Timer 0 Nibble  Mode 1: M1 = 0, M0 = 1  Internal Clock: That mean Timer. So, C/T = 0  Enable by TR0 bits: Gate = 0

Example 9.1 16 TMOD Timer 1 Timer 0 Gate C/T M1 M0 Gate C/T M1 M0 0 0 0 0 0 0 0 1 Find the value for TMOD if we want to program Timer 0 in mode 1, count from internal clock source, and use instructions to enable the timer. Solution:  Timer 0: So, we care only Timer 0 Nibble  Mode 1: M1 = 0, M0 = 1  Internal Clock: That mean Timer. So, C/T = 0  Enable by TR0 bits: Gate = 0 Answer: Value of TMOD is #00000001B or #01H (Use instruction MOV TMOD, #01H)

TCON (Timer Control register) 17  TF1: Timer 1 Over Flow bit  This bit will set when timer is over flow  TR1: Timer 1 Enable bit  Start running of Timer 1  TF0: Timer 0 Over Flow bit  This bit will set when timer is over flow  TR0: Timer 0 Enable bit  Start running of Timer 0  IE1, IT1, IE0, IT0 will describe in next chapter TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 0 0 0 1 0 0 0 0

Mode 1’s Operation 18 THx TLx 0 0 0 1 0 0 0 0 0 1 0 1 1 0 0 1  THx and TLx store start value  Timer operation always count-up (increase) on [THx, TLX] each machine cycle  SETB TRx instruction to start running timer  Over flow when Increase FFFF to 0000  Interval value = FFFF – [TH,TL]  FFFF give minimum interval time  0000 give maximum interval time  Example:  MOV TH0, #22H  MOV TL0, #00H  ; Then interval is FFFF – 2200 = DDFF Machine Cycle.  Tips: Monitor TFx with instruction  “MonitorLable : JNB TFx, MonitorLable”

Example 9.2 19 Calculate amount of time delay in the DELAY subroutine below generated by the timer. Assume that XTAL = 11.0592 MHz. Delay: MOV TMOD, #01 MOV TL0, #0F2H MOV TH0, #0FFH SETB TR0 MonitorTX : JNB TF0, MonitorTX CLR TR0 CLR TF0 RET

Example 9.2 20 Solution: The timer works with a clock frequency of 1/12 of the X’TAL frequency; therefore, we have 11.0592 MHz / 12 = 921.6 kHz as the timer (Machine Cycle) frequency. As a result, each clock has a period of T = 1 / 921.6 kHz = 1.085 (is. In other words, Timer 0 counts up each 1.085 s resulting in delay = number of counts x 1.085 s.

Example 9.2 21 Solution: As the timer counts up, it goes through the states of FFF3, FFF4, FFF5, FFF6, FFF7, FFF8, FFF9, FFFA, FFFB, FFFC, FFFD, FFFE, and FFFFH. One more clock rolls it to 0000, raising the timer flag (TF0 = 1). At that point, the JNB instruction falls through. Timer 0 is stopped by the instruction “CLR TRO”. The DELAY subroutine ends

Example 9.2 22 Place Machine cycle to the code: Delay: MOV TMOD, #01 2 MOV TL0, #0F2H 2 MOV TH0, #0FFH 2 SETB TR0 1 MonitorTX : JNB TF0, MonitorTX 14 CLR TR0 1 CLR TF0 1 RET 2 Total = 25

Example 9.2 23 From total machine cycle used was 25 machine cycles. 25 x 1.058 s. = 27.125 s. So, This subroutine generate delay for 27.125 s. Conclusion: Total Machine cycle to overflow is Machine Cycle = 1 + FFFF – Interval (TH,TL) value

Workshop 9.1 24 Calculate amount of time delay in the DELAY subroutine below generated by the timer. Assume that XTAL = 22.1184 MHz. Delay: MOV TMOD, #01 MOV TL0, #034H MOV TH0, #012H SETB TR0 MonitorTX : JNB TF0, MonitorTX CLR TR0 CLR TF0 RET

Example 9.3 25 Connect Port 3.0 with Input Switch and Port 1.0 with LED Display Write Program for MCS51 to Turn ON LED for 2 Second after user press input switch. Show calculate delay generate by MCS51. Assume that X’TAL = 11.0592 MHz. Start TMOD End P3.0 = 1 ON Display Delay 2 Seconds OFF Display WaitSW: R3 =33D DJNZ R3, Loop Delay Loop:

Example 9.3 26 Connect Port 3.0 with Input Switch and Port 1.0 with LED Display From code below calculate delay generate by MCS51. Assume that X’TAL = 11.0592 MHz. MOV TMOD, #10H ; Set Timer Mode CLR P1.0 WaitSW: JB P3.0, WaitSW SETB P1.0 ACALL Delay CLR P1.0 SJMP $ Delay: MOV R3,#31D MainProcess: MOV TL1,#08H MOV TH1,#1H SETB TR1 Monitoring: JNB TF1, Monitoring CLR TR1 CLR TF1 DJNZ R3, MainProcess RET END

DJNZ (Sample)  ; DJNZ is very convenion for  ; specified number of turn for some process.  MOV R3,#31D  Loop:  ; Process here  DJNZ R3, Loop  END 28 Start R5 =10D End Loop: DJNZ R5, Loop Process

Example 9.4 29 From code below calculate frequency of signal generate by MCS51. Assume that X’TAL = 11.0592 MHz. MOV TMOD, #10H Loop: CPL P1.1 ACALL Delay JMP Loop ; All Loop All Delay + 7 = FF04H = 65286D Machine cycle Delay: MOV TL1,#08H MOV TH1,#1H SETB TR1 Monitoring: JNB TF1, Monitoring CLR TR1 CLR TF1 RET ; All Delay code FEFF END

Example 9.5 30 Write assembly program for MCS51 to generate Pulse signal with duty cycle 20% to pin P1.1 MOV TMOD, #10H Loop: SETB P1.1 ACALL DelayON CLR P1.1 ACALL DelayOFF JMP Loop DelayON: MOV TL1,#00D MOV TH1,#236D ; 256-20 SETB TR1 MonitoringOn: JNB TF1, MonitoringOn CLR TR1 CLR TF1 RET DelayOFF: MOV TL1,#00D MOV TH1,#176D ; 256-80 SETB TR1 MonitoringOff: JNB TF1, MonitoringOff CLR TR1 CLR TF1 RET END

Microprocessor Week 9: Timer and Counter

More Related Content

What's hot

Viewers also liked

Similar to Microprocessor Week 9: Timer and Counter

More from Arkhom Jodtang

Recently uploaded

Microprocessor Week 9: Timer and Counter