Haskell Systemverilog Projects

Systemverilog

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1. clash-ghc

   1 36 1,565 9.0 Haskell

   Haskell to VHDL/Verilog/SystemVerilog compiler

   

   Project mention: Spade Hardware Description Language | news.ycombinator.com | 2025-05-12

   I thought that this was about the hardware description language Clash developed by some ex-colleagues, but it appeared to be something else. Clash [1] is based on the functional programming language Haskell and it can output to VHDL, Verilog, or SystemVerilog.

   Although the last official release mentioned on the website is from 2021, it is still actively developed on GitHub [2]. See also contranomy [3] for a non-pipelined RV32I RISC-V core written in Clash.

   [1] https://clash-lang.org/

   [2] https://github.com/clash-lang/clash-compiler

   [3] https://github.com/christiaanb/contranomy

2. Stream

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   Stream - Scalable APIs for Chat, Feeds, Moderation, & Video. Stream helps developers build engaging apps that scale to millions with performant and flexible Chat, Feeds, Moderation, and Video APIs and SDKs powered by a global edge network and enterprise-grade infrastructure.

   

3. sv2v

   2 3 686 6.0 Haskell

   SystemVerilog to Verilog conversion

   

Haskell Systemverilog related posts

• Verilog functions and wires

  1 project | /r/Verilog | 11 Jun 2023

• An addressable little explored language gap: HDL - Hardware Description Languages, any language used for electronic circuit design, description, and specs

  5 projects | /r/ProgrammingLanguages | 3 May 2023

• HDL desugaring

  1 project | /r/FPGA | 12 Aug 2022

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