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eda-playground

Here are 5 public repositories matching this topic...

nselvara / HDL-Core-Library

Reusable HDL modules, packages, and testbench utilities for FPGA and ASIC development, supporting both VHDL and Verilog.

simulation vhdl rtl hdl testbenches osvvm vunit vhdl-modules vhdl-code vhdl2008 vhdl-testbench eda-playground

Updated Sep 25, 2025
VHDL

nselvara / VHDL-Utils

A VHDL code base that contains Utility Packages for both HDL and Testbenches

simulation vhdl rtl hdl testbenches osvvm vunit vhdl-modules vhdl-code vhdl-testbench eda-playground

Updated Aug 19, 2025
VHDL

panoskoutris / riscv-cpu

Fully functional RISC-V compatible multicycle CPU built in Verilog. Includes ALU, datapath, FSM controller, memory, and testbenches.

fsm fpga hardware simulation verilog computer-architecture icarus-verilog hdl testbench risc-v digital-design processor-design cpu-design eda-playground

Updated Aug 17, 2025
Verilog

slee900 / EE-CS120A

labs verilog systemverilog icarus-verilog eda-playground

Updated Apr 14, 2024
SystemVerilog

KeerthanaPrabhu04 / UVM_TestBench_For_4-to-2_Encoder

encoder uvm uvm-verification eda-playground 4-to-2encoder

Updated May 9, 2024
SystemVerilog

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