[AMDGPU][NPM] Port SIInsertHardClauses to NPM #130062
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This was referenced Mar 6, 2025
This was referenced Mar 6, 2025
optimisan force-pushed the users/optimisan/preemit/port-si-insert-waitcnts branch from 10605a7 to 6faf912 Compare optimisan force-pushed the users/optimisan/preemit/port-si-insert-hard-clauses branch from 88d2174 to 39768ea Compare optimisan force-pushed the users/optimisan/preemit/port-si-insert-waitcnts branch from 6faf912 to 11b7833 Compare optimisan force-pushed the users/optimisan/preemit/port-si-insert-hard-clauses branch from 39768ea to 79a590f Compare 
| @llvm/pr-subscribers-backend-amdgpu Author: Akshat Oke (optimisan) ChangesFull diff: https://github.com/llvm/llvm-project/pull/130062.diff 6 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h index 4dcfaf9b12b5e..b434676f85581 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPU.h +++ b/llvm/lib/Target/AMDGPU/AMDGPU.h @@ -378,6 +378,12 @@ class SIInsertWaitcntsPass : public PassInfoMixin<SIInsertWaitcntsPass> { static bool isRequired() { return true; } }; +class SIInsertHardClausesPass : public PassInfoMixin<SIInsertHardClausesPass> { +public: + PreservedAnalyses run(MachineFunction &MF, + MachineFunctionAnalysisManager &MFAM); +}; + FunctionPass *createAMDGPUAnnotateUniformValuesLegacy(); ModulePass *createAMDGPUPrintfRuntimeBinding(); @@ -451,7 +457,7 @@ extern char &SIModeRegisterID; void initializeAMDGPUInsertDelayAluLegacyPass(PassRegistry &); extern char &AMDGPUInsertDelayAluID; -void initializeSIInsertHardClausesPass(PassRegistry &); +void initializeSIInsertHardClausesLegacyPass(PassRegistry &); extern char &SIInsertHardClausesID; void initializeSIInsertWaitcntsLegacyPass(PassRegistry &); diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def b/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def index c4641cba60e53..3eabe087a8a33 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def +++ b/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def @@ -109,6 +109,7 @@ MACHINE_FUNCTION_PASS("si-fix-vgpr-copies", SIFixVGPRCopiesPass()) MACHINE_FUNCTION_PASS("si-fold-operands", SIFoldOperandsPass()); MACHINE_FUNCTION_PASS("si-form-memory-clauses", SIFormMemoryClausesPass()) MACHINE_FUNCTION_PASS("si-i1-copies", SILowerI1CopiesPass()) +MACHINE_FUNCTION_PASS("si-insert-hard-clauses", SIInsertHardClausesPass()) MACHINE_FUNCTION_PASS("si-insert-waitcnts", SIInsertWaitcntsPass()) MACHINE_FUNCTION_PASS("si-load-store-opt", SILoadStoreOptimizerPass()) MACHINE_FUNCTION_PASS("si-lower-control-flow", SILowerControlFlowPass()) @@ -131,7 +132,6 @@ DUMMY_MACHINE_FUNCTION_PASS("amdgpu-pre-ra-optimizations", GCNPreRAOptimizations DUMMY_MACHINE_FUNCTION_PASS("amdgpu-rewrite-partial-reg-uses", GCNRewritePartialRegUsesPass()) DUMMY_MACHINE_FUNCTION_PASS("amdgpu-set-wave-priority", AMDGPUSetWavePriorityPass()) -DUMMY_MACHINE_FUNCTION_PASS("si-insert-hard-clauses", SIInsertHardClausesPass()) DUMMY_MACHINE_FUNCTION_PASS("si-late-branch-lowering", SILateBranchLoweringPass()) DUMMY_MACHINE_FUNCTION_PASS("si-pre-emit-peephole", SIPreEmitPeepholePass()) // TODO: Move amdgpu-preload-kern-arg-prolog to MACHINE_FUNCTION_PASS since it diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index c3cc1dc6e495b..6c24fe5f1441a 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -534,7 +534,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() { initializeAMDGPUUnifyMetadataPass(*PR); initializeSIAnnotateControlFlowLegacyPass(*PR); initializeAMDGPUInsertDelayAluLegacyPass(*PR); - initializeSIInsertHardClausesPass(*PR); + initializeSIInsertHardClausesLegacyPass(*PR); initializeSIInsertWaitcntsLegacyPass(*PR); initializeSIModeRegisterLegacyPass(*PR); initializeSIWholeQuadModeLegacyPass(*PR); diff --git a/llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp b/llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp index dcc60765cc203..71b937f23cc3c 100644 --- a/llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp +++ b/llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp @@ -36,6 +36,7 @@ #include "MCTargetDesc/AMDGPUMCTargetDesc.h" #include "llvm/ADT/SmallVector.h" #include "llvm/CodeGen/MachineFunctionPass.h" +#include "llvm/CodeGen/MachinePassManager.h" using namespace llvm; @@ -89,18 +90,10 @@ enum HardClauseType { HARDCLAUSE_ILLEGAL, }; -class SIInsertHardClauses : public MachineFunctionPass { +class SIInsertHardClauses { public: - static char ID; const GCNSubtarget *ST = nullptr; - SIInsertHardClauses() : MachineFunctionPass(ID) {} - - void getAnalysisUsage(AnalysisUsage &AU) const override { - AU.setPreservesCFG(); - MachineFunctionPass::getAnalysisUsage(AU); - } - HardClauseType getHardClauseType(const MachineInstr &MI) { if (MI.mayLoad() || (MI.mayStore() && ST->shouldClusterStores())) { if (ST->getGeneration() == AMDGPUSubtarget::GFX10) { @@ -189,9 +182,7 @@ class SIInsertHardClauses : public MachineFunctionPass { return true; } - bool runOnMachineFunction(MachineFunction &MF) override { - if (skipFunction(MF.getFunction())) - return false; + bool run(MachineFunction &MF) { ST = &MF.getSubtarget<GCNSubtarget>(); if (!ST->hasHardClauses()) @@ -265,11 +256,40 @@ class SIInsertHardClauses : public MachineFunctionPass { } }; +class SIInsertHardClausesLegacy : public MachineFunctionPass { +public: + static char ID; + SIInsertHardClausesLegacy() : MachineFunctionPass(ID) {} + + bool runOnMachineFunction(MachineFunction &MF) override { + if (skipFunction(MF.getFunction())) + return false; + + return SIInsertHardClauses().run(MF); + } + + void getAnalysisUsage(AnalysisUsage &AU) const override { + AU.setPreservesCFG(); + MachineFunctionPass::getAnalysisUsage(AU); + } +}; + } // namespace -char SIInsertHardClauses::ID = 0; +PreservedAnalyses +llvm::SIInsertHardClausesPass::run(MachineFunction &MF, + MachineFunctionAnalysisManager &MFAM) { + if (!SIInsertHardClauses().run(MF)) + return PreservedAnalyses::all(); + + auto PA = getMachineFunctionPassPreservedAnalyses(); + PA.preserveSet<CFGAnalyses>(); + return PA; +} + +char SIInsertHardClausesLegacy::ID = 0; -char &llvm::SIInsertHardClausesID = SIInsertHardClauses::ID; +char &llvm::SIInsertHardClausesID = SIInsertHardClausesLegacy::ID; -INITIALIZE_PASS(SIInsertHardClauses, DEBUG_TYPE, "SI Insert Hard Clauses", +INITIALIZE_PASS(SIInsertHardClausesLegacy, DEBUG_TYPE, "SI Insert Hard Clauses", false, false) diff --git a/llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx10.mir b/llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx10.mir index 50eea4aebd5e9..1baceeef82c92 100644 --- a/llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx10.mir +++ b/llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx10.mir @@ -1,5 +1,6 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass si-insert-hard-clauses %s -o - | FileCheck %s +# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs -passes si-insert-hard-clauses %s -o - | FileCheck %s --- name: mimg_nsa diff --git a/llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx11.mir b/llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx11.mir index b22de06e68a7f..7505fde047782 100644 --- a/llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx11.mir +++ b/llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx11.mir @@ -1,5 +1,6 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs -run-pass si-insert-hard-clauses %s -o - | FileCheck %s +# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs -passes si-insert-hard-clauses %s -o - | FileCheck %s --- name: mimg_nsa |
optimisan force-pushed the users/optimisan/preemit/port-si-insert-waitcnts branch from 11b7833 to 5f9af25 Compare optimisan force-pushed the users/optimisan/preemit/port-si-insert-hard-clauses branch from 79a590f to 48ec9e7 Compare 
arsenm approved these changes Mar 10, 2025
cdevadas approved these changes Mar 10, 2025
| @@ -1,5 +1,6 @@ | |||
| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py | |||
| # RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass si-insert-hard-clauses %s -o - | FileCheck %s | |||
| # RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs -passes si-insert-hard-clauses %s -o - | FileCheck %s | |||
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Remove -verify-machineinstrs.
optimisan force-pushed the users/optimisan/preemit/port-si-insert-waitcnts branch from 5f9af25 to ee1cee2 Compare optimisan force-pushed the users/optimisan/preemit/port-si-insert-hard-clauses branch from 48ec9e7 to 78cee57 Compare arsenm approved these changes Mar 12, 2025
optimisan force-pushed the users/optimisan/preemit/port-si-insert-waitcnts branch from ee1cee2 to caa13cc Compare Base automatically changed from users/optimisan/preemit/port-si-insert-waitcnts to main March 24, 2025 16:06
optimisan force-pushed the users/optimisan/preemit/port-si-insert-hard-clauses branch from 78cee57 to 3a314ee Compare optimisan deleted the users/optimisan/preemit/port-si-insert-hard-clauses branch 
| LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/51/builds/13198 Here is the relevant piece of the build log for the reference |
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