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Commits on Oct 31, 2025
AMDGPU: Add baseline test for #161651 (#165921)
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ARM: Avoid doing strncmp on libcall name (#165203)
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AArch64: Add more 3 element vector sincos tests (#165816)
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RuntimeLibcalls: Whitespace fix
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Commits on Oct 28, 2025
DAG: Consider __sincos_stret when deciding to form fsincos (#165169)
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Commits on Oct 27, 2025
AArch64: Clean up some casts to target subclasses (#165189)
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AArch64: Use Register in FrameLowering (#165188)
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ARM: Avoid adding default libcalls overridden by AEABI functions (#164983)
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X86: Make sure compiler-rt div calls are not added for msvc (#164591)
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RuntimeLibcalls: Make sure _Unwind_Resume entries are mutually exclusive (#164195)
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AArch64: Fix undefined behavior in sme calling convention test (#165183)
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AArch64: Reformat some debug printing blocks (#165178)
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Commits on Oct 24, 2025
AArch64: Use RuntimeLibcallsInfo in SMEAttributes (NFC) (#164968)
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DAG: Remove unused TargetLowering field (#164969)
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RuntimeLibcalls: Avoid reporting __stack_chk_guard as available for msvc (#164133)
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CodeGen: Remove overrides of getSSPStackGuardCheck (NFC) (#164044)
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Commits on Oct 23, 2025
MSP430: Remove more default compiler-rt calls (#164752)
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CodeGen: Fix crash when no libcall is available for stackguard (#164211)
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Commits on Oct 21, 2025
TableGen: Use IfDefEmitter (#164209)
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Commits on Oct 20, 2025
AMDGPU: Remove triple field from subtarget (#164208)
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Commits on Oct 17, 2025
CodeGen: Fix hardcoded libcall names in insertSSPDeclarations (NFC) (#163710)
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Commits on Oct 16, 2025
RuntimeLibcalls: Rename long double libcall entries to include suffix (#163675)
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Commits on Oct 13, 2025
AMDGPU: Use ELF mangling in data layout (#163011)
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TableGen: Account for Unsupporte LibcallImpl in bitset size (#163083)
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Commits on Oct 11, 2025
AtomicExpand: Switch X86 test to generated checks (#162968)
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Commits on Oct 10, 2025
CodeGen: Remove unused IntrinsicLowering includes (#162844)
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AMDGPU: Stop using aligned VGPR classes for addRegisterClass (#158278)
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RuntimeLibcalls: Add bitset for available libcalls (#150869)
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RegisterCoalescer: Do not introduce uses of empty register classes (#161809)
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AMDGPU/GlobalISel: Fix using wrong regbank for smfmac (#162762)
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ADT: Add constructor from uint64_t array for Bitset (#162703)
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Commits on Oct 8, 2025
AMDGPU: Render non-0 values for amdgpu-agpr-alloc
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AMDGPU: Fix parsing wrong operand format for read_register/write_register (#162414)
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AMDGPU: Use RegClassByHwMode to manage operand VGPR operand constraints (#158272)
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AMDGPU: Account for read/write register intrinsics for AGPR usage (#161988)
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