Instruction Execution: Straight- line sequencing and branching
Instruction Execution and Straight-Line Sequencing R0,C B,R0 A,R0 Move i + 8 Begin execution here Move i Contents Address C B A the program Data for segment program 3-instruction Add i + 4 A program for C ← [Α] + [Β]. Assumptions: - One memory operand per instruction - 32-bit word length - Memory is byte addressable - Full memory address can be directly specified in a single-word instruction Two-phase procedure -Instruction fetch -Instruction execute
Branching NUMn NUM2 NUM1 R0,SUM NUMn,R0 NUM3,R0 NUM2,R0 NUM1,R0 A straight-line program for adding n numbers. Add Add Move SUM i Move Add i 4n + i 4n 4 - + i 8 + i 4 + • • • • • • • • •
Branching N,R1 Move NUMn NUM2 NUM1 R0,SUM R1 "Next" number to R0 Using a loop to add n numbers. LOOP Decrement Move LOOP loop Program Determine address of "Next" number and add N SUM n R0 Clear Branch>0 • • • • • • Branch target Conditional branch
Condition Codes • Condition code flags • Condition code register / status register • N (negative) • Z (zero) • V (overflow) • C (carry) • Different instructions affect different flags
Conditional Branch Instructions • Example: A: 1 1 1 1 0 0 0 0 B: 0 0 0 1 0 1 0 0 A: 1 1 1 1 0 0 0 0 +(−B): 1 1 1 0 1 1 0 0 1 1 0 1 1 1 0 0 C = 1 N = 1 V = 0 Z = 0
Status Bits ALU V Z N C Zero Check Cn Cn-1 Fn-1 A B F
Addressing Modes
Generating Memory Addresses • How to specify the address of branch target? • Can we give the memory operand address directly in a single Add instruction in the loop? • Use a register to hold the address of NUM1; then increment by 4 on each pass through the loop.
Addressing Modes • Implied – AC is implied in “ADD M[AR]” in “One-Address” instr. – TOS is implied in “ADD” in “Zero-Address” instr. • Immediate – The use of a constant in “MOV R1, 5”, i.e. R1 ← 5 • Register – Indicate which register holds the operand Opcode Mode ...
Addressing Modes • Register Indirect – Indicate the register that holds the number of the register that holds the operand MOV R1, (R2) • Autoincrement / Autodecrement – Access & update in 1 instr. • Direct Address – Use the given address to access a memory location R1 R2 = 3 R3 = 5
Addressing Modes • Indirect Address – Indicate the memory location that holds the address of the memory location that holds the data AR = 101 100 101 102 103 104 0 1 0 4 1 1 0 A
100 101 102 103 104 0 1 2 Addressing Modes • Relative Address – EA = PC + Relative Addr AR = 100 1 1 0 A PC = 2 + Could be Positive or Negative (2’s Complement)
Addressing Modes • Indexed – EA = Index Register + Relative Addr 100 101 102 103 104 AR = 100 1 1 0 A XR = 2 + Could be Positive or Negative (2’s Complement) Useful with “Autoincrement” or “Autodecrement”
Addressing Modes • Base Register – EA = Base Register + Relative Addr 100 101 102 103 104 BR = 100 0 0 0 A AR = 2 + Could be Positive or Negative (2’s Complement) Usually points to the beginning of an array 0 0 0 5 0 0 1 2 0 1 0 7 0 0 5 9
Addressing Modes • The different ways in which the location of an operand is specified in an instruction are referred to as addressing modes. Name Assembler syntax Addressingfunction Immediate #Value Operand = Value Register Ri EA = Ri Absolute(Direct) LOC EA = LOC Indirect (Ri ) EA = [Ri ] (LOC) EA = [LOC] Index X(Ri) EA = [Ri ] + X Basewith index (Ri ,Rj ) EA = [Ri ] + [Rj ] Basewith index X(Ri,Rj ) EA = [Ri ] + [Rj ] + X and offset Relative X(PC) EA = [PC] + X Autoincrement (Ri )+ EA = [Ri ] ; Increment Ri Autodecrement (Ri ) Decrement Ri ; EA = [Ri] −
Indexing and Arrays • Index mode – the effective address of the operand is generated by adding a constant value to the contents of a register. • Index register • X(Ri): EA = X + [Ri] • The constant X may be given either as an explicit number or as a symbolic name representing a numerical value. • If X is shorter than a word, sign-extension is needed.
Indexing and Arrays • In general, the Index mode facilitates access to an operand whose location is defined relative to a reference point within the data structure in which the operand appears. • Several variations: (Ri, Rj): EA = [Ri] + [Rj] X(Ri, Rj): EA = X + [Ri] + [Rj]
Relative Addressing • Relative mode – the effective address is determined by the Index mode using the program counter in place of the general-purpose register. • X(PC) – note that X is a signed number • Branch>0 LOOP • This location is computed by specifying it as an offset from the current value of PC. • Branch target may be either before or after the branch instruction, the offset is given as a singed num.

Program execution, straight line sequence and branching

  • 1.
    Instruction Execution: Straight- linesequencing and branching
  • 2.
    Instruction Execution andStraight-Line Sequencing R0,C B,R0 A,R0 Move i + 8 Begin execution here Move i Contents Address C B A the program Data for segment program 3-instruction Add i + 4 A program for C ← [Α] + [Β]. Assumptions: - One memory operand per instruction - 32-bit word length - Memory is byte addressable - Full memory address can be directly specified in a single-word instruction Two-phase procedure -Instruction fetch -Instruction execute
  • 3.
    Branching NUMn NUM2 NUM1 R0,SUM NUMn,R0 NUM3,R0 NUM2,R0 NUM1,R0 A straight-line programfor adding n numbers. Add Add Move SUM i Move Add i 4n + i 4n 4 - + i 8 + i 4 + • • • • • • • • •
  • 4.
    Branching N,R1 Move NUMn NUM2 NUM1 R0,SUM R1 "Next" number toR0 Using a loop to add n numbers. LOOP Decrement Move LOOP loop Program Determine address of "Next" number and add N SUM n R0 Clear Branch>0 • • • • • • Branch target Conditional branch
  • 5.
    Condition Codes • Conditioncode flags • Condition code register / status register • N (negative) • Z (zero) • V (overflow) • C (carry) • Different instructions affect different flags
  • 6.
    Conditional Branch Instructions •Example: A: 1 1 1 1 0 0 0 0 B: 0 0 0 1 0 1 0 0 A: 1 1 1 1 0 0 0 0 +(−B): 1 1 1 0 1 1 0 0 1 1 0 1 1 1 0 0 C = 1 N = 1 V = 0 Z = 0
  • 7.
    Status Bits ALU V ZN C Zero Check Cn Cn-1 Fn-1 A B F
  • 8.
  • 9.
    Generating Memory Addresses •How to specify the address of branch target? • Can we give the memory operand address directly in a single Add instruction in the loop? • Use a register to hold the address of NUM1; then increment by 4 on each pass through the loop.
  • 10.
    Addressing Modes • Implied –AC is implied in “ADD M[AR]” in “One-Address” instr. – TOS is implied in “ADD” in “Zero-Address” instr. • Immediate – The use of a constant in “MOV R1, 5”, i.e. R1 ← 5 • Register – Indicate which register holds the operand Opcode Mode ...
  • 11.
    Addressing Modes • RegisterIndirect – Indicate the register that holds the number of the register that holds the operand MOV R1, (R2) • Autoincrement / Autodecrement – Access & update in 1 instr. • Direct Address – Use the given address to access a memory location R1 R2 = 3 R3 = 5
  • 12.
    Addressing Modes • IndirectAddress – Indicate the memory location that holds the address of the memory location that holds the data AR = 101 100 101 102 103 104 0 1 0 4 1 1 0 A
  • 13.
    100 101 102 103 104 0 1 2 Addressing Modes • RelativeAddress – EA = PC + Relative Addr AR = 100 1 1 0 A PC = 2 + Could be Positive or Negative (2’s Complement)
  • 14.
    Addressing Modes • Indexed –EA = Index Register + Relative Addr 100 101 102 103 104 AR = 100 1 1 0 A XR = 2 + Could be Positive or Negative (2’s Complement) Useful with “Autoincrement” or “Autodecrement”
  • 15.
    Addressing Modes • BaseRegister – EA = Base Register + Relative Addr 100 101 102 103 104 BR = 100 0 0 0 A AR = 2 + Could be Positive or Negative (2’s Complement) Usually points to the beginning of an array 0 0 0 5 0 0 1 2 0 1 0 7 0 0 5 9
  • 16.
    Addressing Modes • Thedifferent ways in which the location of an operand is specified in an instruction are referred to as addressing modes. Name Assembler syntax Addressingfunction Immediate #Value Operand = Value Register Ri EA = Ri Absolute(Direct) LOC EA = LOC Indirect (Ri ) EA = [Ri ] (LOC) EA = [LOC] Index X(Ri) EA = [Ri ] + X Basewith index (Ri ,Rj ) EA = [Ri ] + [Rj ] Basewith index X(Ri,Rj ) EA = [Ri ] + [Rj ] + X and offset Relative X(PC) EA = [PC] + X Autoincrement (Ri )+ EA = [Ri ] ; Increment Ri Autodecrement (Ri ) Decrement Ri ; EA = [Ri] −
  • 17.
    Indexing and Arrays •Index mode – the effective address of the operand is generated by adding a constant value to the contents of a register. • Index register • X(Ri): EA = X + [Ri] • The constant X may be given either as an explicit number or as a symbolic name representing a numerical value. • If X is shorter than a word, sign-extension is needed.
  • 18.
    Indexing and Arrays •In general, the Index mode facilitates access to an operand whose location is defined relative to a reference point within the data structure in which the operand appears. • Several variations: (Ri, Rj): EA = [Ri] + [Rj] X(Ri, Rj): EA = X + [Ri] + [Rj]
  • 19.
    Relative Addressing • Relativemode – the effective address is determined by the Index mode using the program counter in place of the general-purpose register. • X(PC) – note that X is a signed number • Branch>0 LOOP • This location is computed by specifying it as an offset from the current value of PC. • Branch target may be either before or after the branch instruction, the offset is given as a singed num.