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Design and implementation of vending machine using verilog hdl
- 1. “ Design andImplementation of Vending Machine using Verilog” 2025-26 DEPT. of ELECTRONICS & COMMUNICATION ENGINEERING, SKSVMACET, Lakshmeshwar. Page 1 CONTENTS Abstract 2 Chapter 1 Introduction 3 Chapter 2 Literature Review 4 Chapter 3 Objectives 5 Chapter 4 Methodology 6 Chapter 5 Expected Outcome 7 Chapter 6 References 8
- 2. “ Design andImplementation of Vending Machine using Verilog” 2025-26 DEPT. of ELECTRONICS & COMMUNICATION ENGINEERING, SKSVMACET, Lakshmeshwar. Page 2 ABSTRACT This project aims to design and implement a digital vending machine using Verilog Hardware Description Language (HDL). The vending machine accepts coins of specific denominations ( 5 and 10) and dispenses products of different prices ( 5, 10, and 20). The design is implemented using Finite State Machine (FSM) concepts to handle different states such as idle, coin insertion, amount accumulation, product dispensing, and reset. The project demonstrates how digital system design techniques can be used to automate real-world applications like vending machines.
- 3. “ Design andImplementation of Vending Machine using Verilog” 2025-26 DEPT. of ELECTRONICS & COMMUNICATION ENGINEERING, SKSVMACET, Lakshmeshwar. Page 3 CHAPTER – 1 INTRODUCTION Automation plays a vital role in simplifying human efforts and increasing efficiency in day-to-day tasks. A vending machine is a widely used automated system that dispenses products to users in exchange for money, without human intervention. These machines are commonly seen in public places like railway stations, schools, offices, and shopping complexes. The main objective of this project is to design and implement a digital vending machine using Verilog HDL. The proposed machine accepts ₹5 and ₹10 coins and dispenses products priced at ₹5, ₹10, and ₹20. The design is modeled using Finite State Machine (FSM) concepts to handle different operations such as idle, coin insertion, product selection, dispensing, and reset. By implementing the design in Verilog HDL and testing it through simulation tools like Xilinx ISE/ModelSim, the project demonstrates how digital logic design and HDL programming can be applied to real-world applications. This approach makes the system cost-effective, reliable, and suitable for further hardware implementation using FPGAs.
- 4. “ Design andImplementation of Vending Machine using Verilog” 2025-26 DEPT. of ELECTRONICS & COMMUNICATION ENGINEERING, SKSVMACET, Lakshmeshwar. Page 4 CHAPTER – 2 LITERATURE REVIEW Literature survey has been made in the area of interest, the purpose of this review of literature is to provide background information of the issues, methodologies and problem relevance of the study, a brief review of which has been discussed in this chapter. AUTHOR PAPER SOURCE FINDING Rishabh Sati; Varun Mishra; Gourav Verma Simulation of Vending Machine Design using Verilog HDL IEEE- Published in: 2022 2nd Asian Conference on Innovation in Technology (ASIANCON) The IEEE study demonstrates that a Verilog HDL-based FSM vending machine can be designed and simulated successfully. It validates essential features—product dispensing, change return, and cancel operations—and shows FPGA synthesis feasibility, making it an effective prototype for real-world vending applications. A. Krishna Kumar, G. Ashritha, D. Deepika. DESIGN OF VENDING MACHINE USING VERILOG HDL 2018 JETIR July 2018, Volume 5, Issue 7 www.jetir.org (ISSN- 2349-5162) The vending machine designed using Verilog HDL successfully dispenses three products with features of returning change and refunding money on cancellation, meeting the specified requirements.
- 5. “ Design andImplementation of Vending Machine using Verilog” 2025-26 DEPT. of ELECTRONICS & COMMUNICATION ENGINEERING, SKSVMACET, Lakshmeshwar. Page 5 CHAPTER – 3 OBJECTIVES The main objective of designing a vending machine using Verilog is to develop a digital system that can automatically dispense products based on user input, while ensuring accuracy, efficiency, and reliability. By implementing the vending machine logic in Verilog, the design can be simulated, tested, and verified at the hardware description level before deployment on FPGA or ASIC platforms. This helps in understanding how real-time decision-making works in digital circuits, such as accepting valid inputs (like coins or selection codes), verifying conditions, and delivering the correct product or change. The project also aims to provide hands-on experience with concepts like finite state machines (FSM), sequential logic design, and digital system verification, which are essential skills in VLSI and embedded system design. Overall, the goal is not only to create a functional vending machine model but also to strengthen knowledge of digital design methodology and its practical applications in automation systems.
- 6. “ Design andImplementation of Vending Machine using Verilog” 2025-26 DEPT. of ELECTRONICS & COMMUNICATION ENGINEERING, SKSVMACET, Lakshmeshwar. Page 6 CHAPTER - 4 METHODOLOGY The methodology for designing the vending machine in Verilog begins with identifying the system requirements, such as the number of products, accepted coin denominations, and output actions like product dispensing and returning change. Next, the functionality is mapped into a Finite State Machine (FSM), defining states such as idle, product selection, coin insertion, verification, dispensing, and reset. Once the FSM is designed, the state transitions and logic conditions are described using Verilog HDL, focusing on sequential and combinational logic blocks. After coding, the design undergoes simulation in software tools like ModelSim or Xilinx ISE to verify correct functionality under different input conditions and edge cases. Any errors or incorrect behaviors are debugged, and the Verilog code is refined. Finally, the verified design can be synthesized and implemented on an FPGA development board for hardware-level testing, ensuring that the vending machine operates as intended. This step-by- step methodology ensures a systematic approach from conceptual design to real-time hardware implementation. BLOCK DIAGRAM:
- 7. “ Design andImplementation of Vending Machine using Verilog” 2025-26 DEPT. of ELECTRONICS & COMMUNICATION ENGINEERING, SKSVMACET, Lakshmeshwar. Page 7 CHAPTER – 5 EXPECTED OUTCOME The expected outcome of this project is to design and implement a fully functional vending machine model in Verilog that can accurately simulate the real-time operation of a vending system. The project is expected to handle user inputs such as product selection and coin insertion, verify the correctness of the transaction, and dispense the selected product or return change when necessary. It should also demonstrate the use of finite state machines (FSM) for efficient control logic, ensuring smooth transitions between states like idle, selection, payment, dispensing, and reset. Additionally, the project is expected to provide a clear understanding of digital design, verification, and simulation processes using Verilog, while serving as a practical application of automation and control in real-world systems. Ultimately, the expectation is to deliver both a working Verilog model and a deeper learning experience in hardware description language programming and digital circuit design.
- 8. “ Design andImplementation of Vending Machine using Verilog” 2025-26 DEPT. of ELECTRONICS & COMMUNICATION ENGINEERING, SKSVMACET, Lakshmeshwar. Page 8 REFERENCES 1. Kiran Kumar, “FSM Based Design on the Replication of one-hot code using Verilog HDL,” Global Jouranl of Advanced Engineering Technologies, Vol.2, Issue-3, 2013. 2. Abishek Luthra, “Design and Implementation of Vending Machine using Verilog HDL on FPGA,” International Journal of Innovative Research in Science, Engineering and Technology, Vol.4, Issue-11, November, 2015. 3. Ana Monga, Balwinder Singh, Academic and Consultancy-Services Division, Centre for Development of Advanced Computing (C-DAC), Mohali, India, “Finite State Machine based Vending Machine Controller with Auto-Billing Features,” International Journal of VLSI design and Communication Systems (VLSICS), Vol.3, No.2, April 2012. 4. P. Pradeepa, T. Sudhalavanya, K. Suganthi, N. Suganthi, M.Menagadevi, Suganthi, et. al., “Design and Implementation of Vending Machine using Verilog HDL,” International Journal of Advanced Engineering Technology.