This project is based on Digital VLSI Testing and Testability. The netlist is given as input, the code performs Dominance fault collapsing, Parallel fault simulation, Deductive fault simulation.
- Updated
Nov 16, 2021 - Jupyter Notebook
This project is based on Digital VLSI Testing and Testability. The netlist is given as input, the code performs Dominance fault collapsing, Parallel fault simulation, Deductive fault simulation.
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