nrf7120pdk to nrf7120 dk name change required for upstream porting

platform/ext/target/nordic_nrf/common/core/CMakeLists.txt

@@ -37,7 +37,7 @@ if((NRF_SOC_VARIANT MATCHES "^nrf54l1[05]$") OR
  # variables keep changing so we check both to be future proof
  set(HAS_RRAMC 1)
  set(HAS_CRACEN 1)
-elseif((NRF_SOC_VARIANT MATCHES nrf7120) OR (TFM_PLATFORM MATCHES "nordic\_nrf\/nrf7120pdk\_nrf7120\_cpuapp") OR (PSA_API_TEST_TARGET MATCHES "nrf7120"))
+elseif((NRF_SOC_VARIANT MATCHES nrf7120) OR (TFM_PLATFORM MATCHES "nordic\_nrf\/nrf7120dk\_nrf7120\_cpuapp") OR (PSA_API_TEST_TARGET MATCHES "nrf7120"))
  set(HAS_MRAMC 1)
  set(HAS_CRACEN 1)
 else()

platform/ext/target/nordic_nrf/common/nrf7120/memory_service_ranges/tfm_platform_user_memory_ranges.h

@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2025 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef TFM_PLATFORM_USER_MEMORY_RANGES_H__
+#define TFM_PLATFORM_USER_MEMORY_RANGES_H__
+
+#include <tfm_ioctl_core_api.h>
+
+#include <nrfx.h>
+
+
+static const struct tfm_read_service_range ranges[] = {
+{ .start = 0xFFFFFFFF, .size = 0x0},
+};
+
+static const struct tfm_write32_service_address tfm_write32_service_addresses[] = {
+/* This is a dummy value because this table cannot be empty */
+{.addr = 0xFFFFFFFF, .mask = 0x0, .allowed_values = NULL, .allowed_values_array_size = 0},
+};
+
+#endif /* TFM_PLATFORM_USER_MEMORY_RANGES_H__ */

platform/ext/target/nordic_nrf/common/nrf7120/nrf71_init.c

@@ -6,7 +6,6 @@
  */
 #include <stdint.h>
 #include <nrfx.h>
-#include <nrf_erratas.h>
 
 #ifndef BIT_MASK
 /* Use Zephyr BIT_MASK for unasigned integers */

platform/ext/target/nordic_nrf/common/nrf7120/partition/flash_layout.h

@@ -42,21 +42,17 @@
 /* Use Flash memory to store Code data */
 #define FLASH_BASE_ADDRESS (0x0)
 
-/* nRF7120 has 4088 kB of non volatile memory (MRAM) but the last 116kB are reserved
+/* nRF7120 has 4084 kB of non volatile memory (MRAM) but the last 116kB are reserved
  * for FLPR MCU in Zephyr. For simplicity and for possible support for running FLPR along
  * with TF-M later FLPR non volatile memory is not used by TF-M. */
-#define FLASH_TOTAL_SIZE (0x3E1000) /* 3972 kB since the last 116kB are reserved for FLPR */
+#define FLASH_TOTAL_SIZE (0x3E0000) /* 3968 kB since the last 116kB are reserved for FLPR */
 #define TOTAL_ROM_SIZE FLASH_TOTAL_SIZE
 
-/* nRF7120 has 1024 kB of volatile memory (SRAM) but only 512kB are reserved for Arm Cortex-M33.
- * RAM_00: 512 Kb - Arm® Cortex®-M33 code and data
- * RAM_01: 256 Kb - ML accelerator
- * RAM_02: 128 Kb - Network Buffer WiFi/Radio system
- * RAM_03: 120 Kb - FLPR code, data and top 8Kb reserved
+/* nRF7120 has 1024 kB of volatile memory (SRAM) but only 768kB are reserved for Arm Cortex-M33.
  * For simplicity and for possible support for running FLPR along
  * with TF-M later FLPR volatile memory is not used by TF-M. */
 #define SRAM_BASE_ADDRESS (0x20000000)
-#define TOTAL_RAM_SIZE (0x00080000) /* 512 kB, since other 512 kB are reserved for others */
+#define TOTAL_RAM_SIZE (0x000C0000) /* 768 kB, since other 256 kB are reserved for FLPR */
 
 #define FLASH_S_PARTITION_SIZE (0x80000) /* S partition: 512 kB*/
 #define FLASH_NS_PARTITION_SIZE (0xD3000) /* NS partition: 844 kB*/

platform/ext/target/nordic_nrf/nrf7120dk_nrf7120_cpuapp/services/include/tfm_platform_user_memory_ranges.h

@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2021 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef TFM_PLATFORM_USER_MEMORY_RANGES_H__
+#define TFM_PLATFORM_USER_MEMORY_RANGES_H__
+
+#include <tfm_ioctl_core_api.h>
+
+#include <nrfx.h>
+
+
+static const struct tfm_read_service_range ranges[] = {
+{ .start = 0xFFFFFFFF, .size = 0x0},
+};
+
+static const struct tfm_write32_service_address tfm_write32_service_addresses[] = {
+/* This is a dummy value because this table cannot be empty */
+{.addr = 0xFFFFFFFF, .mask = 0x0, .allowed_values = NULL, .allowed_values_array_size = 0},
+};
+
+#endif /* TFM_PLATFORM_USER_MEMORY_RANGES_H__ */