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generate_tech_xml_files.sh

lang-pythonPython codePython code

lang-shellShell scripts (bash etc.)Shell scripts (bash etc.)

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 2426

#2426 In verilog-to-routing/vtr-verilog-to-routing;

· zsjiang99 opened on Nov 2, 2023

[WIP] Tileable Routing Resource Graph Builder

buildBuild systemBuild system

docsDocumentationDocumentation

external_libs

infraProject InfrastructureProject Infrastructure

lang-cppC/C++ codeC/C++ code

lang-hdlHardware Description Language (Verilog/VHDL)Hardware Description Language (Verilog/VHDL)

lang-makeCMake/Make codeCMake/Make code

lang-netlist

lang-pythonPython codePython code

lang-shellShell scripts (bash etc.)Shell scripts (bash etc.)

libarchfpgaLibrary for handling FPGA Architecture descriptionsLibrary for handling FPGA Architecture descriptions

liblog

libpugiutil

libvtrutil

OdinOdin II Logic Synthesis Tool: Unsorted itemOdin II Logic Synthesis Tool: Unsorted item

Parmys

scriptsUtility & Infrastructure scriptsUtility & Infrastructure scripts

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 2135

#2135 In verilog-to-routing/vtr-verilog-to-routing;

· tangxifan opened on Aug 16, 2022

XDC placement constraints support for interchange

buildBuild systemBuild system

external_libs

infraProject InfrastructureProject Infrastructure

lang-makeCMake/Make codeCMake/Make code

lang-shellShell scripts (bash etc.)Shell scripts (bash etc.)

libarchfpgaLibrary for handling FPGA Architecture descriptionsLibrary for handling FPGA Architecture descriptions

libvtrutil

scriptsUtility & Infrastructure scriptsUtility & Infrastructure scripts

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 2021

#2021 In verilog-to-routing/vtr-verilog-to-routing;

· kboronski-ant opened on May 5, 2022

WIP: Implement inout support into ODIN II

lang-cppC/C++ codeC/C++ code

lang-hdlHardware Description Language (Verilog/VHDL)Hardware Description Language (Verilog/VHDL)

lang-shellShell scripts (bash etc.)Shell scripts (bash etc.)

OdinOdin II Logic Synthesis Tool: Unsorted itemOdin II Logic Synthesis Tool: Unsorted item

scriptsUtility & Infrastructure scriptsUtility & Infrastructure scripts

tests

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 1292

#1292 In verilog-to-routing/vtr-verilog-to-routing;

· djns99 opened on May 1, 2020