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software-defined-radio

Here are 4 public repositories matching this topic...

open-sdr / openwifi-hw

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

linux fpga zynq hls hardware vhdl rtl verilog xilinx sdr wi-fi analog-devices ieee80211 dma software-defined-radio ofdm csma ad9361 mac80211

Updated Sep 23, 2025
Verilog

Teddy-van-Jerry / sdr-psk-fpga

Dual-Mode PSK Transceiver on SDR With FPGA

synchronization fpga zynq amd verilog xilinx sdr vivado transceiver software-defined-radio psk demodulation modulation qpsk bpsk zynq-7000 costas-loop zynq-7020 gardner

Updated Oct 9, 2024
Verilog

Thejas2006 / symbol-timing-recovery-circuit_gardner

An str circuit for timing synchronisation.

verilog-hdl software-defined-radio gardner

Updated Jul 8, 2025
Verilog

Thejas2006 / symbol-timing-recovery-circuit_S_D

An str circuit for timing synchronisation.

synchronisation verilog-hdl software-defined-radio

Updated Jul 4, 2025
Verilog

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