An abstraction library for interfacing EDA tools
fpga simulation vhdl eda verilog xilinx synthesis vivado altera systemverilog icestorm lattice icarus-verilog modelsim ghdl yosys verilator riviera-pro fossi spyglass
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Sep 23, 2025 - Python
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icarus-verilog
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SVUT is a simple framework to create Verilog/SystemVerilog unit tests. Just focus on your tests!
python flow simulator tdd simulation foss verilog testcase tdd-utilities mit-license systemverilog icarus-verilog gtkwave verification-methodologies vcd verilator surfer svut
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Oct 22, 2024 - Python
Example of how to get started with olofk/fusesoc.
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Jul 25, 2021 - Python
Example of Python and PyTest powered workflow for a HDL simulation
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Jan 17, 2021 - Python
🪀 Tool to play with HDL (inspired by EdaPlayground)
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Dec 25, 2022 - Python
Getting started with cocotb
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Aug 13, 2025 - Python
Use GPT-4 to generate, simulate, and visualize Verilog modules from natural language prompts.
ai simulation waveform openai verilog hardware-designs icarus-verilog gtkwave streamlit-webapp gpt-4 eda-tools
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Aug 9, 2025 - Python
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