RISC-V CPU Design using TL-Verilog in Makerchip IDE - RV32I
- Updated
Feb 4, 2023 - Verilog
#
embedded-c
Here are 8 public repositories matching this topic...
Design of a Customizable RISC-V SoC for Clapswitch Application
- Updated
Jun 6, 2025 - Verilog
Display of various animated digital and analog clock using VGA control in FPGA
- Updated
May 23, 2018 - Verilog
This is a space for code elements of my professional portfolio.
- Updated
Sep 8, 2025 - Verilog
This project involves configuring a NIOS II softcore processor on the Altera DE10-Lite FPGA using Quartus Prime. It includes the creation of a custom Board Support Package (BSP), hardware abstraction layer (HAL), and drivers to optimize processor performance.
- Updated
Nov 19, 2024 - Verilog
Implementation of UART communication in C and Verilog
- Updated
Dec 24, 2024 - Verilog
NIOS II controlled hardware ODE solver implemented on Cyclone IV FPGA
- Updated
Oct 24, 2025 - Verilog
advanced UART IP core on Spartan-3E FPGA using Verilog, featuring FSM-based TX/RX logic, FIFO buffering, and configurable baud rate generation, built and tested on Ubuntu Linux using Xilinx ISE.
linux embedded-systems rx hdl verilog-hdl xilinx-fpga uart-protocol fsm-library spartan configuration-files embedded-c tx baud-rate fpga-programming fifo-buffer rtl-design ubuntu2204 ubuntu2404lts
- Updated
Dec 15, 2025 - Verilog
Improve this page
Add a description, image, and links to the embedded-c topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the embedded-c topic, visit your repo's landing page and select "manage topics."