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computer-organization

Here are 50 public repositories matching this topic...

neelkshah / MIPS-Processor

5-stage pipelined 32-bit MIPS microprocessor in Verilog

verilog microprocessor computer-architecture microprocessors verilog-hdl mips-architecture mips-processor bits-pilani computer-organization verilog-components verilog-snippets mips-instructions computer-organisation verilog-programs verilog-simulator verilog-project

Updated Apr 3, 2020
Verilog

rfhits / Computer-Organization-BUAA-2020

北航6系CO课 BUAA CO

co computer-organization buaa 2020

Updated Nov 23, 2021
Verilog

Nibbling-bits

aofarmakis / Nibbling-bits

Design and documentation for a very simple 4-bit processor named NibbleBuddy and its assembler.

assembly assembler verilog computer-architecture instruction-set-architecture computer-organization hardware-description-language processor-design single-cycle-processor

Updated Dec 7, 2024
Verilog

roife / BUAA-CO

Pipelined MIPS CPU（course assignment for BUAA-Computer-Organization）

verilog computer-organization buaa

Updated Feb 5, 2022
Verilog

aditeyabaral / DDCO-Lab-UE18CS207

A repository containing the source codes for the Digital Design and Computer Organization Laboratory course (UE18CS2) at PES University.

verilog logic-programming icarus-verilog digital-design computer-organization verilog-code

Updated Apr 17, 2020
Verilog

explcre / 21Summer-VE370-Intro-to-Computer-Organization-Projects

21Summer-VE370-Intro-to-Computer-Organization-Projects: -Project1: RISC-V Assembly, simluating c code. -Project2: 1.RISC-V64 single cycle processor. 2.RISC-V64 five-stage pipelined processor. -Project3: Virtual memory, TLB, cache, memory simulator. -Project4: Literature review on Computer Organization.

cpu virtual-memory tlb risc-v cpu-emulator computer-organization tlb-simulator riscv64 computer-organisation-architechure risc-v-assembly single-cycle-processor 5-stage-pipeline computer-organization-lab computer-organization-and-design

Updated Apr 11, 2023
Verilog

HDU_CO_Guide

liolok / HDU_CO_Guide

HDU Computer Organization Course Design Beginner Guide - 杭电计组课设新手指南

verilog vivado computer-organization course-design artix-7

Updated May 13, 2019
Verilog

lingbai-kong / MIPS54-multicycle-CPU

同济大学CS《计算机组成原理课程设计》暑期作业TongJi University CS computer organization assignment

fpga mips computer-organization tongji-university multcycle

Updated Jul 25, 2021
Verilog

bhuvansingla / cs220-computer-organization

Assignment submissions of the semester 2020-21-II offering of CS220 at IIT Kanpur

mips verilog computer-organization iitk spim iit-kanpur

Updated May 4, 2021
Verilog

johnc219 / 32-bit-Multicycle-CPU

Verilog Implementation of a 32-bit Multicycle CPU

mips verilog computer-organization 32-bit

Updated Oct 15, 2018
Verilog

L-I-M-I-T / CO_MIPS31

实现MIPS架构指令集下31条指令的单周期CPU，经过Vivado和Modelsim联合仿真通过并在Nexys4开发板上下板通过。

cpu computer-organization

Updated Sep 8, 2021
Verilog

SamuelGong / SingleCycleCPU

A single cycle CPU running MIPS instructions on Xilinx FPGA

cpu fpga xilinx-ise computer-organization single-cycle

Updated Aug 27, 2017
Verilog

pha123661 / Five-Stage-RISC-V-Pipeline-Processor-Verilog

A Verilog implementation of a 5-stage pipeline RISC-V processor.

cpu pipeline computer-architecture risc-v computer-organization verilog-project

Updated Feb 15, 2023
Verilog

marcotulio956 / cache.coherencyLAOCII

Exerting coherency between caches with protocols in a Memory-Shared Multiprocessors system whether it has uniform memory access(UMA, symmetric) or not(non-UMA).

cache verilog computer-architecture memory-hierarchy computer-organization multiprocessor cache-memory coherence-protocol

Updated Aug 23, 2022
Verilog

HsuChiChen / ncku-computer-organization

assembly code, RISC-V, and some implementation regarding computer organization

arduino assembly-language risc-v computer-organization

Updated Aug 23, 2021
Verilog

jongsh / BUAA-CO-2022

北航计算机学院 2022 年计算机组成原理 CO 课程设计

cpu mips verilog logisim computer-organization computer-organisation-architechure

Updated Oct 25, 2025
Verilog

SamuelGong / MultipleCycleCPU

A multiple cycle CPU running MIPS instructions on Xilinx FPGA

cpu fpga xilinx-ise computer-organization multiple-cycle

Updated Aug 27, 2017
Verilog

ibraheemalayan / Simple_Computer_Verilog_Part_1

A Computer Organization Project at BZU

cpu verilog computer-organization

Updated Nov 11, 2021
Verilog

L-I-M-I-T / CO_MIPS54

实现MIPS架构指令集下54条指令的单周期CPU，经过Vivado和Modelsim联合仿真通过并在Nexys4开发板上下板通过。

cpu computer-organization

Updated Sep 8, 2021
Verilog

SamuelGong / MicroprogrammingProcessor

Microgramming technology applied to my multiple cycle CPU

cpu fpga microprogramming xilinx-ise computer-organization multiple-cycle

Updated Aug 27, 2017
Verilog

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