computer-architecture
Here are 93 public repositories matching this topic...
Design and implementation of a complete ARM based CPU.
-  Updated 
Apr 19, 2018  - VHDL
 
FISC - Flexible Instruction Set Computer - Is the new Instruction Set Architecture inspired by ARMv8 and x86-64
-  Updated 
Aug 22, 2019  - VHDL
 
Trabalho de Organização e Arquitetura de Computadores, UnB - 2020/2
-  Updated 
May 23, 2021  - VHDL
 
Project developed for Computer Architecture course
-  Updated 
May 2, 2022  - VHDL
 
Microprocessor without Interlocked Pipelined Stages (MIPS) architectures implemented in single-cycle and multi-cycle formats.
-  Updated 
May 19, 2019  - VHDL
 
An implementation of the LC-3 architecture in VHDL, as described in the book "Introduction to Computing Systems by P&P".
-  Updated 
Aug 18, 2017  - VHDL
 
This is a MIPS 5 stage 32-bit pipelined processor with Harvard architecture, which comes with an assembler to interpret instructions to supported OP codes.
-  Updated 
Aug 12, 2021  - VHDL
 
🏗 💾 | Computer Architecture Course CEIT@AUT
-  Updated 
Oct 27, 2021  - VHDL
 
A collection of useful material and personal projects from the Computer and Informatics Engineering Bachelor's degree program at the University of Aveiro.
-  Updated 
Oct 24, 2023  - VHDL
 
This project implements a CPU with PIPELINE in VHDL. The full source code description is in the src/doc folder. Our repository is also available in Google Drive if you want the files that we used as tool to designing our CPU. Link on README.
-  Updated 
Nov 25, 2019  - VHDL
 
VHDL code of three branch predictors
-  Updated 
Jul 15, 2019  - VHDL
 
Arilla - a RISC-V based microcomputer system, with a PS2 mouse controller and 12-bit RGB SVGA graphics card, running Arilla Paint.
-  Updated 
Sep 7, 2021  - VHDL
 
A simple 5-stage pipelined processor following Harvard's architecture. The processor has RISC-like ISA. There are eight 2-byte general-purpose registers, and another three special-purpose registers (Program Counter, Exception Program Counter, Stack Pointer). The memory address space is 1 MB of 16-bit width and is word addressable.
-  Updated 
Jan 10, 2022  - VHDL
 
Advanced Computer Architecture at EPFL.
-  Updated 
Oct 12, 2021  - VHDL
 
Our project material for the Computer Architecture course for Computer Engineering students at Politecnico di Torino (Polytechnic University of Turin)
-  Updated 
Jul 24, 2018  - VHDL
 
Introduction in Dynamic Instruction Scheduling (Advanced Computer Architecture) implementing Tomasulo's Algorithm
-  Updated 
Mar 24, 2019  - VHDL
 
Code for reproducing CoNGA 2022 results on posit arithmetic operators
-  Updated 
Aug 5, 2024  - VHDL
 
A simplified version of PDP11 instruction set architecture (ISA) using VHDL.
-  Updated 
Jan 20, 2021  - VHDL
 
A simple single-cycle processor designed for educational purposes
-  Updated 
Apr 2, 2022  - VHDL
 
Improve this page
Add a description, image, and links to the computer-architecture topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the computer-architecture topic, visit your repo's landing page and select "manage topics."