support reg_byte registers #630
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| /// Converts a register class to a GCC constraint code. | ||
| fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister { | ||
| let constraint = match reg { | ||
| // For vector registers LLVM wants the register name to match the type size. |
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this comment is lost right now, I'm not sure what it was supposed to say, and why what llvm does is relevant?
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Oh, that was copy-pasted from the LLVM codegen, but I forgot to change that to GCC.
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ok, but what does this comment mean? What type is talked about here? it just doesn't seem like the right place for this comment?
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It comes from here originally.
Maybe the type is the layout parameter that we don't have in cg_gcc.
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yeah I think that's right, e.g.
match layout.size.bytes() { 64 => 'z', 32 => 'y', _ => 'x',this really does pick the register width based on a type. Do you think GCC will have to do the same? So far that does not seem necessary.
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I do not know. I would need to check if needed.
folkertdev force-pushed the x86-register-classes branch from 57fd394 to 53aa977 Compare 
| Is this ready to be merged? |
| yes |
| Thanks for your contribution! |
2 participants
fixes #485
I believe (see the issue) that the
bsuffix can just be trimmed, without causing invalid behavior.I also refactored a bit to reduce the level of nesting, given that we probably need much more logic here to support more register classes that don't translate 1-to-1 between llvm and gcc. Hopefully the rustc assembly tests will guide us towards the edge cases.