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Innovating
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Innovating
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nishit0072e/README.md

GitHub Followers LinkedIn Total Repositories nishit0072e

🏆 About Me

🔬 Researcher | Engineer | Innovator
📍 Passionate about: VLSI, Embedded Systems & IoT
📡 Currently Exploring: ASIC Design

🔖 IEEE Published Author:
📜 "Novel Sign-Magnitude Binary to Balanced-Ternary Encoder on Basys3 Artix7 FPGA (EDKCON 2024)"

🏅 GitHub Trophies

🚀 Tech Stack

🔥 Hardware & Platforms:

  • 🚀 FPGA: Xilinx FPGAs
  • 🖥 MCUs: CH32V003, THEJAS32, ESP32, ESP8266, ARDUINO 
  • 🔌 IoT & Wireless: BT, WiFi

💻 Software & Tools:

  • ⚙️ Languages: C, C++, Python, Verilog
  • 🛠️ Tools: Vivado, VS Code, Modelsim, eSim, Tanner, Cadence
  • 💿 Windows, Ubuntu, Centos

arduino c git ifttt linux matlab python

📊 GitHub Stats

📡 Contact & Connect

nishit-bayen-🇮🇳-423aa421b nishit-bayen-🇮🇳-423aa421b nishit-bayen-🇮🇳-423aa421b

✨ "Building the Future, One Line of Code at a Time!" 🚀

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  1. RTL-to-GDSII RTL-to-GDSII Public

    Complete installation flow of yosys, OpenSTA and OpenROAD for RTL Verification, Synthesis, Timing Analysis, Power Analysis & GDSII layout generation

    C++ 15 4

  2. Vega-Firmware-Build-Upload-Automation Vega-Firmware-Build-Upload-Automation Public

    An automation script using Makefile & Batchfile for Building to Uploading programs into Vega Processor by CDAC India with Taurus SDK, in Windows Platform

    Batchfile 4

  3. vsd-mini vsd-mini Public

    This Repository solely made for the Research Internship using VSDSquadron Mini RISC-V Development Board

  4. tt10-my-proj tt10-my-proj Public template

    Python