Wrong encoding for vector ld/st whole register instructions #48828
Description
| Bugzilla Link | 49484 |
| Resolution | FIXED |
| Resolved on | Mar 30, 2021 20:24 |
| Version | trunk |
| OS | All |
| Blocks | #48246 |
| CC | @asb,@topperc,@tstellar |
| Fixed by commit(s) | 5cdb2e9 |
Extended Description
The following assembly:
vs8r.v v24, (a0) Generates a wrong encoding [0x27,0x0c,0x85,0x02].
which should be [0x27,0x0c,0x85,0xe2]
Similarly, vs1r/vs2r/vs4r & vl1r/vl2r/vl4r/vl8r go the same.