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Disable unusable pins for various chips #4202
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Disable unusable pins for various chips #4202
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| If I'm already working with this, I will probably check other chips too, if we're not enabling pins we shouldn't. So in case it'll get approved, PLEASE don't merge it just yet 😄 |
ee0089e to 14cdc2e Compare 9f55752 to c4b29ef Compare esp-metadata/devices/esp32.toml Outdated
| { pin = 17, functions = { 3 = "HS1_DATA5", 4 = "U2TXD", 5 = "EMAC_CLK_180" }, analog = {}, rtc = {} }, | ||
| { pin = 18, functions = { 1 = "VSPICLK", 3 = "HS1_DATA7" }, analog = {}, rtc = {} }, | ||
| { pin = 19, functions = { 1 = "VSPIQ", 3 = "U0CTS", 5 = "EMAC_TXD0" }, analog = {}, rtc = {} }, | ||
| { pin = 20 }, # ESP32-PICO-V3 only |
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we should probably drop this one, too, for now
esp-metadata/devices/esp32c2.toml Outdated
| { pin = 7, functions = { 0 = "MTDO", 2 = "FSPID" } }, | ||
| { pin = 8 }, | ||
| { pin = 9 }, | ||
| { pin = 10 }, # Available without SiP flash |
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Let's remove the comment from pin 10
| Since the title talks about ESP32/C2/H2 ... is the plan to add the other chips to this PR or handle them in separate PRs? |
| Looking at datasheets a bit more, we have a few more adjustments to make, these are also flash/PSRAM-connected pins: C3: pins 11..=17 |
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bugadani left a comment
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Thanks! Perhaps another set of eyes would be nice on this one, but I think that should be all :)
bjoernQ left a comment
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Looks complete to me
That's fun 🤪 |
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PSRAM tests broke
adc5486 to cf69d6e Compare cf69d6e to de5d12a Compare de5d12a to 5e60510 Compare * Allow setting a custom idle hook (esp-rs#4209) * Document esp-rtos just a bit (esp-rs#4208) * Slight MG touchup * Document esp-rtos in migration guide * Document things * Apply suggestion from @Copilot Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com> * Improve esp-rtos docs --------- Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com> * refactor(ledc): introduce freq unset error and mode conversion (esp-rs#4214) * feat: introduce freq unset error and mode conversion * chore: format * refactor * refactor!: rename api * fix * fix docs * Disable unusable pins for various chips (esp-rs#4202) * ESP32: disable integrated SPI-connected pins * remove unavailable/non-existent pins for esp32c2 and esp32h2 * address reviews, drop more user-unusable pins * edit the changelog * fix psram (esp32) oi * RTOS: Use simpler sync object for executor (esp-rs#4215) * Use simpler sync object internally * Update esp-rtos/src/task/mod.rs Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com> --------- Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com> * Monitor the main stack's stack guard (esp-rs#4207) * Monitor the main stack's stack guard * CHANGELOG.md * Clippy * Save a bit of RAM * Some some IRAM * Avoid warning * Hint on register names * Protect the main stack on the second core, too * Fix `rt` w/o main stack protection * Use correct cfg gates * Refactor * Improvements * More rt gating * Stack-guard for second core * Adapt examples and tests * Bump somni-expr * CHANGELOG and migration guide * Fix doc-tests * fmt * Use ESP_HAL_CONFIG_STACK_GUARD_OFFSET for the second core * Fix test * Honor stack_guard_monitoring everywhere * Fix rebased migration guide * Fix doc-tests again * Update esp-hal/src/debugger.rs Co-authored-by: Dániel Buga <bugadani@gmail.com> * Write the stack guard value on the second core --------- Co-authored-by: Dániel Buga <bugadani@gmail.com> * Move `multicore` from `esp-storage` to `esp-hal` (esp-rs#4188) * Move multicore from esp-storage to esp-hal * changelog * reviews * address review comments and clean up * remove duplicated park_core() and split is_running() per chip * cleanup * Clean up blocking until deadline (esp-rs#4217) * Hw-based RTOS stack overflow detection (esp-rs#4218) * Respect the stack guard offset in thread stacks * Use the hardware watchpoint to protect rtos thread stacks * Use watchpoints for stack overflow detection * Do not rely on the value of the stack guard (esp-rs#4220) * Make BLE task configurable (esp-rs#4223) * Redo config options (esp-rs#4224) * Remove unused deps (esp-rs#4230) * `esp-phy` the second (esp-rs#4228) * Hopefully fixes it * fmt * Fix documentation link in Cargo.toml --------- Co-authored-by: Dániel Buga <bugadani@gmail.com> * twai: do not abort transmissions on recoverable errors (esp-rs#4227) * twai: do not abort transmissions on recoverable errors The TWAI driver's interrupt handler currently aborts transmissions if certain (error) interrupts were triggered. This causes the transmission of frames to become unreliable, because the `transmit_async` operation does not return any error codes if a transmission was aborted. Additionally, the TWAI controller is designed to be a reliable and, with the exception of the bus-off state, normally would simply try to rentransmit a message on its own. Therefore, this commit removes transmission abortion on errors and, instead, only aborts a transmission if the controller changes into the bus-off state. Fixes esp-rs#4222 * Update esp-hal/CHANGELOG.md Co-authored-by: Juraj Sadel <jurajsadel@gmail.com> --------- Co-authored-by: Juraj Sadel <jurajsadel@gmail.com> * Change default wifi_max_burst_size (esp-rs#4231) * Remove outdated limitation (esp-rs#4232) * feat: Use github actions artifacts to store semver baseline --------- Co-authored-by: Dániel Buga <bugadani@gmail.com> Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com> Co-authored-by: Ethan Wu <7086cmd@gmail.com> Co-authored-by: Kirill Mikhailov <62840029+playfulFence@users.noreply.github.com> Co-authored-by: Björn Quentin <bjoernQ@users.noreply.github.com> Co-authored-by: Juraj Sadel <juraj.sadel@espressif.com> Co-authored-by: Simon Neuenhausen <frostie.neuenhausen@gmail.com> Co-authored-by: Harald Böhm <harald@boehm.dev> Co-authored-by: Juraj Sadel <jurajsadel@gmail.com>
closes #4187 (see my comment there)
MISC: I also checked whether the

i2sHIL test onesp32suddenly started working — nope, unfortunately it did not.