This project is a showcase and starting point for M.2 PCIe hardware. The interface chip CH382 was used to inteface between the first PCIe lane and the CH32V208 MCU over UART. Check out the versionProject video

RTS and DTR control flow signals are used to put the MCU into bootloader. !Caution This version is not working correctly as the signals are flipped on boot etc. Here is an updated version

In general the interface chip draws 170mA which puts the little LDO at it's limit. The thermals are terrible. Would not recomment to use this setup for a commercial project without a severe refinement.

The firmware can be uploaded via the wch web isp

The code is written with the MounRiver Studio

Node.js is required to run the websocket server

The majority of the web tool and the server are generated with ChatGPT which was trained on dacades of mine and your public code.