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92279fb
Clean up AP data after ending it
sebromero Aug 11, 2021
8bf029a
Enable 320x320 resolution for himax HM01B0 (#294)
idohalamit Aug 16, 2021
d9b005f
Merge pull request #303 from sebromero/fix-corrupted-state
facchinm Aug 16, 2021
1177e48
Add edge_control to full package
facchinm Aug 16, 2021
7de71b7
Rebuild variants on mbed 6.13
facchinm Aug 16, 2021
0841cfb
Merge pull request #304 from arduino/bug-fix/check-vbus-pin-en-status…
MaxPayne86 Aug 20, 2021
0f4da2d
Fix missing re-initialization of g_i_channels when restarting peripheral
pennam Sep 2, 2021
c996ed7
Set decimation and rawBufferIndex to their default value
pennam Sep 2, 2021
2913b42
Add pio_remove_program function to PDM end method
pennam Sep 2, 2021
e991842
Merge pull request #315 from pennam/pdm_2040_crash_fix
facchinm Sep 13, 2021
a1ebc12
Merge pull request #314 from pennam/portenta_pdm_restart_fix
facchinm Sep 13, 2021
441778f
Tune I2C Slave thread + increase buff size
giulcioffi Jul 7, 2021
f5c10cd
Add 'transport' to upload recipe
giulcioffi Jul 7, 2021
aa152f2
Add NICLA target
giulcioffi Jul 7, 2021
306a30b
Set GPIO3 pin HIGH at begin because it matches MKR Reset pin
giulcioffi Jul 19, 2021
031d34f
Add defines to PIN_WIRE_SDA/SCL
giulcioffi Aug 2, 2021
abdf9f6
Rebuild patches folder
facchinm Aug 3, 2021
d16f3d9
Nicla: Specify compiler version
facchinm Aug 3, 2021
78e071a
Add Nicla to resulting json
facchinm Aug 5, 2021
850854b
NICLA: improve system library thread safety
facchinm Aug 17, 2021
2bb9eb8
GH: add Nicla to automatic tests
facchinm Aug 17, 2021
0288c54
TEMP: NICLA: enable LDO at boot
facchinm Aug 17, 2021
060d892
Add NICLA SENSE to full.variables
facchinm Sep 20, 2021
e93d792
Portenta: split flash via menus
facchinm Aug 16, 2021
1f062f2
Add example to boot M4 code from file + SDRAM
facchinm Aug 16, 2021
2cb4f4d
Recompile variants on mbed 6.14.0
facchinm Aug 17, 2021
1fda0f0
Portenta_m4: fix BootFromSDRAM example
facchinm Sep 22, 2021
01a3d75
Nicla: add overloads for LED*
facchinm Sep 22, 2021
9cfccbd
Update install instructions to reflect symlink removal
per1234 Sep 22, 2021
8d5510a
Merge pull request #329 from per1234/update-symlink-instructions
facchinm Sep 22, 2021
14e4eba
Add ns_cmdline and blockdevice patches
facchinm Sep 22, 2021
af83a6f
Fix Portenta packaging script
facchinm Sep 22, 2021
bd234d7
Rebuild variants with ns_cmdline patch
facchinm Sep 22, 2021
1070aae
Fix blockdevice headers
facchinm Sep 23, 2021
a5644ce
Release 2.5.2
facchinm Sep 23, 2021
7f9ad83
Fixes the preprocess linkerscript
rajames Sep 23, 2021
51bf25a
Merge pull request #333 from rajames/fix-preprocess-linkerscript
facchinm Sep 24, 2021
32b4cfc
SocketWrapper: UDP: send packet on endPacket(), not on write()
facchinm Sep 28, 2021
5746714
Merge pull request #337 from facchinm/udp_socketbuffer_fix
facchinm Sep 29, 2021
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Portenta: split flash via menus
* Relocate SDRAM at 0x60000000 to make it executable without touching the MPU * Patch mbed-os-to-arduino to automatically patch the linker scripts
  • Loading branch information
facchinm committed Sep 21, 2021
commit e93d792853090a6c5607ca69daca15d185f9d460
29 changes: 26 additions & 3 deletions boards.txt
Original file line number Diff line number Diff line change
Expand Up @@ -43,16 +43,25 @@ edge_control.bootloader.file=EDGE_CONTROL/bootloader.hex

##############################################################

menu.split=Flash split

envie_m7.name=Arduino Portenta H7 (M7 core)
envie_m7.build.core=arduino
envie_m7.build.crossprefix=arm-none-eabi-
envie_m7.build.compiler_path={runtime.tools.arm-none-eabi-gcc-7-2017q4.path}/bin/

envie_m7.menu.split.50_50=1MB M7 + 1MB M4
envie_m7.menu.split.75_25=1.5MB M7 + 0.5MB M4
envie_m7.menu.split.100_0=2MB M7 + M4 in SDRAM

envie_m7.build.variant=PORTENTA_H7_M7
envie_m7.build.mcu=cortex-m7
envie_m7.build.fpu=-mfpu=fpv5-d16
envie_m7.build.float-abi=-mfloat-abi=softfp
envie_m7.build.extra_flags=
envie_m7.menu.split.50_50.build.extra_ldflags=-DCM4_BINARY_START=0x08100000
envie_m7.menu.split.75_25.build.extra_ldflags=-DCM4_BINARY_START=0x08180000
envie_m7.menu.split.100_0.build.extra_ldflags=-DCM4_BINARY_START=0x60000000
envie_m7.build.architecture=cortex-m7
envie_m7.build.board=PORTENTA_H7_M7
envie_m7.build.ldscript=linker_script.ld
Expand Down Expand Up @@ -81,7 +90,9 @@ envie_m7.upload.interface=0
envie_m7.upload.use_1200bps_touch=true
envie_m7.upload.wait_for_upload_port=true
envie_m7.upload.native_usb=true
envie_m7.upload.maximum_size=786432
envie_m7.menu.split.50_50.upload.maximum_size=786432
envie_m7.menu.split.75_25.upload.maximum_size=1441792
envie_m7.menu.split.100_0.upload.maximum_size=1966080
envie_m7.upload.maximum_data_size=523624

envie_m7.debug.tool=gdb
Expand All @@ -105,11 +116,18 @@ envie_m4.build.core=arduino
envie_m4.build.crossprefix=arm-none-eabi-
envie_m4.build.compiler_path={runtime.tools.arm-none-eabi-gcc-7-2017q4.path}/bin/

envie_m4.menu.split.50_50=1MB M7 + 1MB M4
envie_m4.menu.split.75_25=1.5MB M7 + 0.5MB M4
envie_m4.menu.split.100_0=2MB M7 + M4 in SDRAM

envie_m4.build.variant=PORTENTA_H7_M4
envie_m4.build.mcu=cortex-m4
envie_m4.build.fpu=-mfpu=fpv4-sp-d16
envie_m4.build.float-abi=-mfloat-abi=softfp
envie_m4.build.extra_flags=
envie_m4.menu.split.50_50.build.extra_ldflags=-DCM4_BINARY_START=0x08100000 -DCM4_BINARY_END=0x08200000
envie_m4.menu.split.75_25.build.extra_ldflags=-DCM4_BINARY_START=0x08180000 -DCM4_BINARY_END=0x08200000
envie_m4.menu.split.100_0.build.extra_ldflags=-DCM4_BINARY_START=0x60000000 -DCM4_BINARY_END=0x60040000 -DCM4_RAM_END=0x60080000
envie_m4.build.architecture=cortex-m4
envie_m4.build.board=PORTENTA_H7_M4
envie_m4.build.ldscript=linker_script.ld
Expand All @@ -132,12 +150,17 @@ envie_m4.upload.vid=0x2341
envie_m4.upload.pid=0x035b
envie_m4.upload.protocol=
envie_m4.upload.transport=
envie_m4.upload.address=0x08100000
envie_m4.upload.interface=0
envie_m4.upload.use_1200bps_touch=true
envie_m4.upload.wait_for_upload_port=true
envie_m4.upload.native_usb=true
envie_m4.upload.maximum_size=1048576
envie_m4.menu.split.50_50.upload.address=0x08100000
envie_m4.menu.split.75_25.upload.address=0x08180000
#make loading the M4 in this way fail - the user needs to provide a file via mass storage or similar interfaces
envie_m4.menu.split.100_0.upload.address=
envie_m4.menu.split.50_50.upload.maximum_size=1048576
envie_m4.menu.split.75_25.upload.maximum_size=524288
envie_m4.menu.split.100_0.upload.maximum_size=524288
envie_m4.upload.maximum_data_size=294248

envie_m4.debug.tool=gdb
Expand Down
2 changes: 1 addition & 1 deletion libraries/KernelDebug/src/KernelDebug.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -305,7 +305,7 @@ static const char g_memoryMapXml[] = "<?xml version=\"1.0\"?>"
"<memory type=\"ram\" start=\"0x58026000\" length=\"0x800\"> </memory>"
"<memory type=\"ram\" start=\"0x58027000\" length=\"0x400\"> </memory>"
"<memory type=\"flash\" start=\"0x90000000\" length=\"0x10000000\"> <property name=\"blocksize\">0x200</property></memory>"
"<memory type=\"ram\" start=\"0xc0000000\" length=\"0x800000\"> </memory>"
"<memory type=\"ram\" start=\"0x60000000\" length=\"0x800000\"> </memory>"
"</memory-map>";

extern "C" uint32_t Platform_GetDeviceMemoryMapXmlSize(void)
Expand Down
2 changes: 1 addition & 1 deletion libraries/Portenta_Camera/camera.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
#include "camera.h"
#include "stm32h7xx_hal_dcmi.h"

#define CAMERA_FRAME_BUFFER 0xC0200000
#define CAMERA_FRAME_BUFFER SDRAM_START_ADDRESS + 0x200000

#define ARGB8888_BYTE_PER_PIXEL 4

Expand Down
37 changes: 37 additions & 0 deletions libraries/Portenta_SDRAM/SDRAM.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -18,10 +18,47 @@ int SDRAMClass::begin(uint32_t start_address) {
then enable access/caching for the size used
*/

if (SDRAM_START_ADDRESS != 0xC0000000) {
printf("remap ram to 0x60000000\n");
HAL_SetFMCMemorySwappingConfig(FMC_SWAPBMAP_SDRAM_SRAM);
}

#if 0

printf("setup mpu\n");
#define MPU_SDRAM_EXEC_REGION_NUMBER MPU_REGION_SDRAM1
#define MPU_SDRAM_REGION_TEX (0x4 << MPU_RASR_TEX_Pos) /* Cached memory */
#define MPU_SDRAM_EXEC_REGION_SIZE (22 << MPU_RASR_SIZE_Pos) /* 2^(22+1) = 8Mo */
#define MPU_SDRAM_ACCESS_PERMSSION (0x03UL << MPU_RASR_AP_Pos)
#define MPU_SDRAM_REGION_CACHABLE (0x01UL << MPU_RASR_C_Pos)
#define MPU_SDRAM_REGION_BUFFERABLE (0x01UL << MPU_RASR_B_Pos)

MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
/* Configure SDARM region as first region */
MPU->RNR = MPU_SDRAM_EXEC_REGION_NUMBER;
/* Set MPU SDARM base address (0xD0000000) */
MPU->RBAR = SDRAM_START_ADDRESS;
/*
- Execute region: RASR[size] = 22 -> 2^(22+1) -> size 8MB
- Access permission: Full access: RASR[AP] = 0b011
- Cached memory: RASR[TEX] = 0b0100
- Disable the Execute Never option: to allow the code execution on SDRAM: RASR[XN] = 0
- Enable the region MPU: RASR[EN] = 1
*/
MPU->RASR = (MPU_SDRAM_EXEC_REGION_SIZE | MPU_SDRAM_ACCESS_PERMSSION | MPU_SDRAM_REGION_TEX | \
MPU_RASR_ENABLE_Msk | MPU_SDRAM_REGION_BUFFERABLE) & ~MPU_RASR_XN_Msk ;

/* Enable MPU and leave the predefined regions to default configuration */
MPU->CTRL |= MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_ENABLE_Msk;
#endif

#if 0
mpu_config_start();
mpu_config_region(MPU_REGION_SDRAM1, SDRAM_START_ADDRESS, MPU_CONFIG_DISABLE(0x00, MPU_REGION_SIZE_512MB));
mpu_config_region(MPU_REGION_SDRAM2, SDRAM_START_ADDRESS, MPU_CONFIG_SDRAM(SDRAM_MPU_REGION_SIZE));
mpu_config_end();
#endif

}

if (start_address) {
Expand Down
4 changes: 2 additions & 2 deletions libraries/Portenta_SDRAM/SDRAM.h
Original file line number Diff line number Diff line change
Expand Up @@ -4,8 +4,8 @@

#include "Arduino.h"

#define SDRAM_END_ADDRESS (0xC0800000)
#define SDRAM_START_ADDRESS (0xC0000000)
#define SDRAM_END_ADDRESS (0x60800000)
#define SDRAM_START_ADDRESS (0x60000000)

class SDRAMClass {
public:
Expand Down
2 changes: 1 addition & 1 deletion libraries/Portenta_SDRAM/ram_internal.c
Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,7 @@ static HAL_StatusTypeDef FMC_SDRAM_Clock_Config(void)
RCC_PeriphCLKInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_PLL2;
RCC_PeriphCLKInitStruct.PLL2.PLL2RGE = RCC_PLL1VCIRANGE_2;
RCC_PeriphCLKInitStruct.PLL2.PLL2M = 5;
RCC_PeriphCLKInitStruct.PLL2.PLL2N = 200;
RCC_PeriphCLKInitStruct.PLL2.PLL2N = 160;
RCC_PeriphCLKInitStruct.PLL2.PLL2FRACN = 0;
RCC_PeriphCLKInitStruct.PLL2.PLL2P = 2;
RCC_PeriphCLKInitStruct.PLL2.PLL2R = 4;
Expand Down
4 changes: 3 additions & 1 deletion libraries/Portenta_Video/anx7625.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -929,8 +929,10 @@ static void stm32_LayerInit(uint16_t LayerIndex, uint32_t FB_Address)
HAL_LTDC_ConfigLayer(&ltdc, &Layercfg, LayerIndex);
}

#include "SDRAM.h"

#define BYTES_PER_PIXEL 2
#define FB_BASE_ADDRESS ((uint32_t)0xC0000000)
#define FB_BASE_ADDRESS ((uint32_t)SDRAM_START_ADDRESS)
#define FB_ADDRESS_0 (FB_BASE_ADDRESS)
#define FB_ADDRESS_1 (FB_BASE_ADDRESS + (lcd_x_size * lcd_y_size * BYTES_PER_PIXEL))

Expand Down
2 changes: 1 addition & 1 deletion libraries/RPC/RPC.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -166,7 +166,7 @@ int RPC::begin() {

//resource_table_load_from_flash();
//HAL_SYSCFG_EnableCM4BOOT();
HAL_RCCEx_EnableBootCore(RCC_BOOT_C2);
bootM4();

eventThread = new rtos::Thread(osPriorityHigh);
eventThread->start(&eventHandler);
Expand Down
2 changes: 1 addition & 1 deletion libraries/ThreadDebug/src/ThreadDebug.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -717,7 +717,7 @@ static const char g_memoryMapXml[] = "<?xml version=\"1.0\"?>"
"<memory type=\"ram\" start=\"0x58027000\" length=\"0x400\"> </memory>"
"<memory type=\"flash\" start=\"0x90000000\" length=\"0x10000000\"> <property name=\"blocksize\">0x200</property></memory>"
#ifndef CORE_CM4
"<memory type=\"ram\" start=\"0xc0000000\" length=\"0x800000\"> </memory>"
"<memory type=\"ram\" start=\"0x60000000\" length=\"0x800000\"> </memory>"
#endif
"</memory-map>";
#endif
Expand Down
4 changes: 4 additions & 0 deletions mbed-os-to-arduino
Original file line number Diff line number Diff line change
Expand Up @@ -191,6 +191,10 @@ generate_flags () {
OPENAMP_REGIONS="__OPENAMP_region_start__ = 0x38000400;\n__OPENAMP_region_end__ = 0x38000400 + LENGTH(RAM_D3) - 1K;"
sed -i "s?ENTRY(Reset_Handler)?${OPENAMP_REGIONS}\nENTRY(Reset_Handler)?g" $ARDUINOVARIANT/linker_script.ld
fi
echo "Patching linker scripts"
sed -i 's/0x8100000/CM4_BINARY_START/g' "$ARDUINOVARIANT"/linker_script.ld
sed -i 's/LENGTH = 0x100000/LENGTH = CM4_BINARY_END - CM4_BINARY_START/g' "$ARDUINOVARIANT"/linker_script.ld
sed -i 's/LENGTH = 0xc0000/LENGTH = CM4_BINARY_START - 0x8040000/g' "$ARDUINOVARIANT"/linker_script.ld
fi
if [[ $ARDUINOVARIANT == *NANO_RP2040* ]]; then
set +e
Expand Down
14 changes: 8 additions & 6 deletions platform.txt
Original file line number Diff line number Diff line change
Expand Up @@ -39,8 +39,7 @@ compiler.define=-DARDUINO=

# this can be overriden in boards.txt
build.extra_flags=
build.extra.startobjects=
build.extra.endobjects=
build.extra_ldflags=
compiler.mbed=

# These can be overridden in platform.local.txt
Expand Down Expand Up @@ -71,19 +70,22 @@ build.zip.pattern={recipe.size.pattern}
# -----------------------

## Compile c files
recipe.c.o.pattern="{compiler.path}{compiler.c.cmd}" {compiler.c.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} -DARDUINO_ARCH_MBED {build.library_discovery_phase_flag} {build.extra_flags} {compiler.c.extra_flags} "-I{build.core.path}/api/deprecated" "-I{build.core.path}/api/deprecated-avr-comp" {includes} "-iprefix{build.core.path}" "@{compiler.mbed.includes}" -o "{object_file}" "{source_file}"
recipe.c.o.pattern="{compiler.path}{compiler.c.cmd}" {compiler.c.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} -DARDUINO_ARCH_MBED {build.library_discovery_phase_flag} {build.extra_flags} {build.extra_ldflags} {compiler.c.extra_flags} "-I{build.core.path}/api/deprecated" "-I{build.core.path}/api/deprecated-avr-comp" {includes} "-iprefix{build.core.path}" "@{compiler.mbed.includes}" -o "{object_file}" "{source_file}"

## Compile c++ files
recipe.cpp.o.pattern="{compiler.path}{compiler.cpp.cmd}" {compiler.cpp.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} -DARDUINO_ARCH_MBED {build.library_discovery_phase_flag} {includes} {build.extra_flags} {compiler.cpp.extra_flags} "-I{build.core.path}/api/deprecated" "-I{build.core.path}/api/deprecated-avr-comp" "-iprefix{build.core.path}" "@{compiler.mbed.includes}" "{source_file}" -o "{object_file}"
recipe.cpp.o.pattern="{compiler.path}{compiler.cpp.cmd}" {compiler.cpp.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} -DARDUINO_ARCH_MBED {build.library_discovery_phase_flag} {includes} {build.extra_flags} {build.extra_ldflags} {compiler.cpp.extra_flags} "-I{build.core.path}/api/deprecated" "-I{build.core.path}/api/deprecated-avr-comp" "-iprefix{build.core.path}" "@{compiler.mbed.includes}" "{source_file}" -o "{object_file}"

## Compile asm files
recipe.S.o.pattern="{compiler.path}{compiler.S.cmd}" {compiler.S.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} -DARDUINO_ARCH_MBED {includes} {build.extra_flags} {compiler.cpp.extra_flags} "-I{build.core.path}/api/deprecated" "-I{build.core.path}/api/deprecated-avr-comp" "-iprefix{build.core.path}" "@{compiler.mbed.includes}" "{source_file}" -o "{object_file}"
recipe.S.o.pattern="{compiler.path}{compiler.S.cmd}" {compiler.S.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} -DARDUINO_ARCH_MBED {includes} {build.extra_flags} {build.extra_ldflags} {compiler.cpp.extra_flags} "-I{build.core.path}/api/deprecated" "-I{build.core.path}/api/deprecated-avr-comp" "-iprefix{build.core.path}" "@{compiler.mbed.includes}" "{source_file}" -o "{object_file}"

## Create archives
recipe.ar.pattern="{compiler.path}{compiler.ar.cmd}" {compiler.ar.flags} {compiler.ar.extra_flags} "{archive_file_path}" "{object_file}"

## Preprocess linker script
recipe.hooks.linking.prelink.1.pattern="{compiler.path}{compiler.c.elf.cmd}" -E -P -x c {build.extra_flags} {build.extra_ldflags} "{build.variant.path}/{build.ldscript}" -o {build.path}/{build.ldscript}

## Combine gc-sections, archives, and objects
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" "-L{build.path}" {compiler.c.elf.flags} {compiler.c.elf.extra_flags} "@{compiler.mbed.ldflags}" "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" --specs=nosys.specs {compiler.ldflags} -o "{build.path}/{build.project_name}.elf" {object_files} -Wl,--whole-archive "{build.path}/{archive_file}" {compiler.mbed} -Wl,--no-whole-archive -Wl,--start-group {compiler.mbed.extra_ldflags} {compiler.libraries.ldflags} -Wl,--end-group
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" "-L{build.path}" {compiler.c.elf.flags} {compiler.c.elf.extra_flags} {build.extra_flags} {build.extra_ldflags} "@{compiler.mbed.ldflags}" "-T{build.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" --specs=nosys.specs {compiler.ldflags} -o "{build.path}/{build.project_name}.elf" {object_files} -Wl,--whole-archive "{build.path}/{archive_file}" {compiler.mbed} -Wl,--no-whole-archive -Wl,--start-group {compiler.mbed.extra_ldflags} {compiler.libraries.ldflags} -Wl,--end-group

## Create eeprom
recipe.objcopy.eep.pattern=
Expand Down
1 change: 1 addition & 0 deletions variants/PORTENTA_H7_M4/conf/mbed_app.json
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@
"rtos.main-thread-stack-size": 32768,
"cordio.max-connections": 5,
"target.macros_add": [
"NO_VTOR_RELOCATE",
"METAL_INTERNAL",
"VIRTIO_SLAVE_ONLY",
"NO_ATOMIC_64_SUPPORT",
Expand Down
2 changes: 1 addition & 1 deletion variants/PORTENTA_H7_M4/linker_script.ld
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
MEMORY
{
FLASH (rx) : ORIGIN = 0x8100000, LENGTH = 0x100000
FLASH (rx) : ORIGIN = CM4_BINARY_START, LENGTH = CM4_BINARY_END - CM4_BINARY_START
RAM (rwx) : ORIGIN = 0x10000000 + (((166 * 4) + 7) & 0xFFFFFFF8), LENGTH = 0x48000 - (((166 * 4) + 7) & 0xFFFFFFF8)
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K
}
Expand Down
2 changes: 1 addition & 1 deletion variants/PORTENTA_H7_M7/linker_script.ld
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
MEMORY
{
FLASH (rx) : ORIGIN = 0x8040000, LENGTH = 0xc0000
FLASH (rx) : ORIGIN = 0x8040000, LENGTH = CM4_BINARY_START - 0x8040000
DTCMRAM (rwx) : ORIGIN = 0x20000000 + (((166 * 4) + 7) & 0xFFFFFFF8), LENGTH = 128K - (((166 * 4) + 7) & 0xFFFFFFF8)
RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 0x80000
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K
Expand Down
2 changes: 1 addition & 1 deletion variants/PORTENTA_H7_M7/pins_arduino.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ extern "C" bool isBetaBoard();

// Booting
// ----
#define bootM4() LL_RCC_ForceCM4Boot() // Provide a memorable alias
void bootM4();

extern PinName digitalPinToPinName(pin_size_t P);

Expand Down
47 changes: 47 additions & 0 deletions variants/PORTENTA_H7_M7/variant.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -270,4 +270,51 @@ void _ontouch1200bps_() {
NVIC_SystemReset();
}

#include "stm32h7xx_ll_system.h"

void bootM4() {

#if 0
// This address need to be in range 0x10000000-0x3FFF0000 to be usable by the M4 as a trampoline
uint32_t __attribute__((aligned(0x10000))) trampoline[2];
static const uint32_t RAM_BASE_FOR_TRAMPOLINE = (uint32_t)&trampoline[0];

#if 0

// This snippet MUST be executed BEFORE calling bootM4()
// The only purpose it to fread() a file into CM4_BINARY_START location

SDRAM.begin(0);

// Copy M4 firmware to SDRAM
FILE* fw = fopen("/fs/fw.bin", "r");
if (fw == NULL) {
while (1) {
Serial.println("Please copy a firmware for M4 core in the PORTENTA mass storage");
delay(100);
}
}
fread((uint8_t*)CM4_BINARY_START, getFileSize(fw), 1, fw);
fclose(fw);
#endif

// We need to call this in case we want to use BACKUP_SRAM as trampoline
HAL_PWR_EnableBkUpAccess();

// Copy first 2 words of the firmware in trampoline location
memcpy((void*)RAM_BASE_FOR_TRAMPOLINE, (void*)CM4_BINARY_START, 8);

SCB_CleanDCache();

// Set CM4_BOOT0 address
// This actually writes a flash register and thus is persistent across reboots
// RAM_BASE_FOR_TRAMPOLINE must be aligned to 0x10000 barrier
LL_SYSCFG_SetCM4BootAddress0(RAM_BASE_FOR_TRAMPOLINE >> 16);
#else
// Classic boot, just set the address and we are ready to go
LL_SYSCFG_SetCM4BootAddress0(CM4_BINARY_START >> 16);
LL_RCC_ForceCM4Boot();
#endif
}

#endif