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Pull requests: Xilinx/llvm-aie
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[AIEX] Use AA to improve post-swp timed regions merging
#737 opened Dec 15, 2025 by andcarminati Loading…
Add C and Python bindings to BlockFloatQuantized Type
#736 opened Dec 15, 2025 by jorickert Loading…
Revert Hotfixes in SubReg Coalescing and Intrinsic Attributes
#735 opened Dec 12, 2025 by F-Stuckmann • Draft
[AIEX] Refactor Set/GetControlRegister and UPS instruction selection to share common code
#712 opened Nov 17, 2025 by abhinay-anubola Loading…
[DRAFT] [AIEX] simplify Debug types across AIE architectures
#670 opened Oct 1, 2025 by F-Stuckmann • Draft
[AIE2P] Add alternative calling convention for library calls
#664 opened Sep 24, 2025 by konstantinschwarz Loading…
[DRAFT][AIE2P] Add pseudo to handle VMAC_f_vmac_bf_vmul_bf_core_X_X
#649 opened Sep 11, 2025 by andcarminati Loading…
[AIE2P][Vectorization] Support for reduction in Peano
#604 opened Aug 7, 2025 by Sameeranjoshi Loading…
[aie][aie2p] Global Isel : trunc vector when size(src)/size(dst) = 4
#496 opened Jun 20, 2025 by newling Loading…
[AIE2P] Add SingletonCopyEdges dag mutator in pre-scheduler
#469 opened May 14, 2025 by khallouh Loading…
[AIE2P] Support all 64-bit-destination G_BUILD_VECTOR in legalizer
#467 opened May 13, 2025 by khallouh Loading…
[AIE2p] Use multi-slot pseudo for const COPY with unique def
#454 opened May 2, 2025 by krishnamtibrewala Loading…
[AIE2P] Allow more address chaining and add a profitability check heuristic
#451 opened Apr 28, 2025 by khallouh Loading…
[DRAFT][AIEX] Improve pre-sched decisions for Post-SWP candidates
#429 opened Apr 8, 2025 by andcarminati • Draft
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