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author | Jeff Lane <jeffrey.lane@canonical.com> | 2015-12-14 14:51:15 +0000 |
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committer | Sylvain Pineau <> | 2015-12-14 14:51:15 +0000 |
commit | 1004a4da329cbae8a241c7e6d3f977ee16a6bd8c (patch) | |
tree | 738107eb9d77935f06657d1d0f8fb99d751746e0 /bin | |
parent | e19f87ddd58994f4eecc4e132768841ecc5cf5f7 (diff) | |
parent | f1746d2da888dc26e0d242c369020adbec28bca7 (diff) |
"automatic merge of lp:~bladernr/checkbox/1525009-memory_compare-on-arm/ by tarmac [r=pwlars][bug=1525009][author=bladernr]"
Diffstat (limited to 'bin')
-rwxr-xr-x | bin/memory_compare | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/bin/memory_compare b/bin/memory_compare index 12a14ec..c145038 100755 --- a/bin/memory_compare +++ b/bin/memory_compare @@ -24,6 +24,7 @@ import os import sys +import re from math import log, copysign from subprocess import check_output, PIPE @@ -37,8 +38,13 @@ class LshwJsonResult: memory_reported = 0 banks_reported = 0 + # jlane LP:1525009 + # Discovered the case can change, my x86 systems used "System Memory" + # Failing ARM system used "System memory" + desc_regex = re.compile('System Memory', re.IGNORECASE) + def addHardware(self, hardware): - if hardware['id'] == 'memory': + if self.desc_regex.match(str(hardware.get('description',0))): self.memory_reported += int(hardware.get('size', 0)) elif 'bank' in hardware['id']: self.banks_reported += int(hardware.get('size', 0)) |