After further review, refined the matching a bit so only one regex is needed

1 files changed, 3 insertions, 6 deletions

diff --git a/bin/memory_compare b/bin/memory_compare
index ec307fe..c145038 100755
--- a/bin/memory_compare
+++ b/bin/memory_compare
@@ -37,18 +37,15 @@ class LshwJsonResult:
 
 memory_reported = 0
 banks_reported = 0
- 
+
 # jlane LP:1525009
- # some systems ID as "memory" and some as "memory:X"
- id_regex = re.compile('memory:?\d?')
 # Discovered the case can change, my x86 systems used "System Memory"
 # Failing ARM system used "System memory"
 desc_regex = re.compile('System Memory', re.IGNORECASE)
 
 def addHardware(self, hardware):
- if self.id_regex.match(hardware['id']):
- if self.desc_regex.match(hardware.get('description',0)):
- self.memory_reported += int(hardware.get('size', 0))
+ if self.desc_regex.match(str(hardware.get('description',0))):
+ self.memory_reported += int(hardware.get('size', 0))
 elif 'bank' in hardware['id']:
 self.banks_reported += int(hardware.get('size', 0))