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QREM-CORE / keccak-engine

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A FIPS 202 compliant SystemVerilog implementation of the Keccak permutation (SHA-3/SHAKE). Features a high-frequency multi-cycle architecture, runtime-configurable modes (SHA3-256/512, SHAKE128/256), and standard AXI4-Stream interfaces with full backpressure support. Verified using embedded SVA properties and official NIST test vectors.

hashing keccak hardware-acceleration sha3-256 sha3-512 shake128 shake256 fips202 keccak-sponge
  • Updated Dec 24, 2025
  • SystemVerilog

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