A Built in Self Test (BIST) controller is created in Verilog HDL to test a 6-bit Carry Lookahead Adder (CLA) utilising a 4-bit Signature Output Response Analyser (ORA).
- Updated
Aug 4, 2024 - Verilog
#
4bitsignature
Here is 1 public repository matching this topic...
Improve this page
Add a description, image, and links to the 4bitsignature topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the 4bitsignature topic, visit your repo's landing page and select "manage topics."