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ARC: Fix building with GCC 4.8 #24

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ARC: Fix building with GCC 4.8 #24

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2 changes: 1 addition & 1 deletion target/arc/cpu.c
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Original file line number Diff line number Diff line change
Expand Up @@ -295,7 +295,7 @@ static void arc_cpu_realizefn(DeviceState *dev, Error **errp)
| (cpu->cfg.dmp_unaligned ? BIT(22) : 0) | BIT(23)
| (cpu->cfg.code_density ? (2 << 24) : 0) | BIT(28);

#elif TARGET_ARCV3
#elif defined(TARGET_ARCV3)
cpu->isa_config = 0x03 /* ver */
| (1 << 8) /* va_size: 48-bit */
| (1 << 16) /* pa_size: 48-bit */
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4 changes: 2 additions & 2 deletions target/arc/cpu.h
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Expand Up @@ -70,7 +70,7 @@ enum exception_code_list {
#ifdef TARGET_ARCV2
EXCP_TLB_MISS_I,
EXCP_TLB_MISS_D,
#elif TARGET_ARCV3
#elif defined(TARGET_ARCV3)
EXCP_IMMU_FAULT,
EXCP_DMMU_FAULT,
#else
Expand Down Expand Up @@ -254,7 +254,7 @@ typedef struct CPUARCState {

#ifdef TARGET_ARCV2
struct arc_mmu mmu; /* mmu.h */
#elif TARGET_ARCV3
#elif defined(TARGET_ARCV3)
struct arc_mmuv6 mmu; /* mmu.h */
#endif
ARCMPU mpu; /* mpu.h */
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2 changes: 1 addition & 1 deletion target/arc/gdbstub.c
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Expand Up @@ -32,7 +32,7 @@

#ifdef TARGET_ARCV2
#define GDB_GET_REG gdb_get_reg32
#elif TARGET_ARCV3
#elif defined(TARGET_ARCV3)
#define GDB_GET_REG gdb_get_reg64
#else
#error No target is selected.
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2 changes: 1 addition & 1 deletion target/arc/helper.c
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Expand Up @@ -87,7 +87,7 @@ void arc_cpu_do_interrupt(CPUState *cs)
case EXCP_TLB_MISS_D:
name = "TLB Miss Data";
break;
#elif TARGET_ARCV3
#elif defined(TARGET_ARCV3)
case EXCP_IMMU_FAULT:
name = "Instruction MMU Fault";
break;
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2 changes: 1 addition & 1 deletion target/arc/irq.c
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Expand Up @@ -33,7 +33,7 @@
#ifdef TARGET_ARCV2
#define TARGET_LONG_LOAD(ENV, ADDR) cpu_ldl_data(ENV, ADDR)
#define TARGET_LONG_STORE(ENV, ADDR, VALUE) cpu_stl_data(ENV, ADDR, VALUE)
#elif TARGET_ARCV3
#elif defined(TARGET_ARCV3)
#define TARGET_LONG_LOAD(ENV, ADDR) cpu_ldq_data(ENV, ADDR)
#define TARGET_LONG_STORE(ENV, ADDR, VALUE) cpu_stq_data(ENV, ADDR, VALUE)
#else
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2 changes: 1 addition & 1 deletion target/arc/irq.h
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Expand Up @@ -34,7 +34,7 @@ void unpack_status32(ARCStatus *, uint32_t);

#ifdef TARGET_ARCV2
#define OFFSET_FOR_VECTOR(VECNO) (VECNO << 2)
#elif TARGET_ARCV3
#elif defined(TARGET_ARCV3)
#define OFFSET_FOR_VECTOR(VECNO) (VECNO << 3)
#else
#error Should never be reached
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2 changes: 1 addition & 1 deletion target/arc/translate.c
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Expand Up @@ -758,7 +758,7 @@ arc_gen_SR(DisasCtxt *ctx, TCGv src2, TCGv src1)

#ifdef TARGET_ARCV2
writeAuxReg(src2, src1);
#elif TARGET_ARCV3
#elif defined(TARGET_ARCV3)
TCGv temp = tcg_temp_local_new();
tcg_gen_andi_tl(temp, src1, 0xffffffff);
writeAuxReg(src2, src1);
Expand Down