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Commit 0fbae91

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author
Jim Lindblom
committed
Re-routing i/o traces to get better ground fill.
1 parent b1cc197 commit 0fbae91

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3 files changed

+776
-1490
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3 files changed

+776
-1490
lines changed

Hardware/esp32-thing-temp.lbr

Lines changed: 44 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1125,20 +1125,21 @@
11251125
</polygon>
11261126
</package>
11271127
<package name="0603">
1128-
<wire x1="-0.356" y1="0.432" x2="0.356" y2="0.432" width="0.1016" layer="51"/>
1129-
<wire x1="-0.356" y1="-0.419" x2="0.356" y2="-0.419" width="0.1016" layer="51"/>
1130-
<rectangle x1="-0.8382" y1="-0.4699" x2="-0.3381" y2="0.4801" layer="51"/>
1131-
<rectangle x1="0.3302" y1="-0.4699" x2="0.8303" y2="0.4801" layer="51"/>
1132-
<rectangle x1="-0.1999" y1="-0.3" x2="0.1999" y2="0.3" layer="35"/>
1133-
<smd name="1" x="-0.85" y="0" dx="1.1" dy="1" layer="1"/>
1134-
<smd name="2" x="0.85" y="0" dx="1.1" dy="1" layer="1"/>
1128+
<description>&lt;p&gt;&lt;b&gt;Generic 1608 (0603) package&lt;/b&gt;&lt;/p&gt;
1129+
&lt;p&gt;0.2mm courtyard excess rounded to nearest 0.05mm.&lt;/p&gt;</description>
11351130
<wire x1="-1.6" y1="0.7" x2="1.6" y2="0.7" width="0.0508" layer="39"/>
11361131
<wire x1="1.6" y1="0.7" x2="1.6" y2="-0.7" width="0.0508" layer="39"/>
11371132
<wire x1="1.6" y1="-0.7" x2="-1.6" y2="-0.7" width="0.0508" layer="39"/>
11381133
<wire x1="-1.6" y1="-0.7" x2="-1.6" y2="0.7" width="0.0508" layer="39"/>
1134+
<wire x1="-0.356" y1="0.432" x2="0.356" y2="0.432" width="0.1016" layer="51"/>
1135+
<wire x1="-0.356" y1="-0.419" x2="0.356" y2="-0.419" width="0.1016" layer="51"/>
1136+
<smd name="1" x="-0.85" y="0" dx="1.1" dy="1" layer="1"/>
1137+
<smd name="2" x="0.85" y="0" dx="1.1" dy="1" layer="1"/>
11391138
<text x="0" y="0.762" size="0.6096" layer="25" font="vector" ratio="20" align="bottom-center">&gt;NAME</text>
11401139
<text x="0" y="-0.762" size="0.6096" layer="27" font="vector" ratio="20" align="top-center">&gt;VALUE</text>
1141-
<rectangle x1="-6.5499" y1="-0.3" x2="-6.1501" y2="0.3" layer="35"/>
1140+
<rectangle x1="-0.8382" y1="-0.4699" x2="-0.3381" y2="0.4801" layer="51"/>
1141+
<rectangle x1="0.3302" y1="-0.4699" x2="0.8303" y2="0.4801" layer="51"/>
1142+
<rectangle x1="-0.1999" y1="-0.3" x2="0.1999" y2="0.3" layer="35"/>
11421143
</package>
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</packages>
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<symbols>
@@ -1396,15 +1397,25 @@
13961397
<pin name="XTAL_N" x="-50.8" y="7.62" length="short"/>
13971398
<pin name="XTAL_P" x="-50.8" y="10.16" length="short"/>
13981399
<pin name="VDDA" x="-50.8" y="33.02" length="short"/>
1399-
<pin name="RES_14K" x="-50.8" y="-33.02" length="short"/>
1400-
<pin name="CAP_10N" x="-50.8" y="-30.48" length="short"/>
1400+
<pin name="CAP2" x="-50.8" y="-33.02" length="short"/>
1401+
<pin name="CAP1" x="-50.8" y="-30.48" length="short"/>
14011402
<pin name="GND" x="-50.8" y="-38.1" length="short"/>
14021403
<pin name="(VSPIHD/HS2_CMD)GPIO21" x="50.8" y="7.62" length="short" rot="R180"/>
14031404
<wire x1="48.26" y1="40.64" x2="-48.26" y2="40.64" width="0.254" layer="94"/>
14041405
<wire x1="-48.26" y1="40.64" x2="-48.26" y2="-40.64" width="0.254" layer="94"/>
14051406
<wire x1="-48.26" y1="-40.64" x2="48.26" y2="-40.64" width="0.254" layer="94"/>
14061407
<wire x1="48.26" y1="-40.64" x2="48.26" y2="40.64" width="0.254" layer="94"/>
14071408
</symbol>
1409+
<symbol name="CAP-1">
1410+
<wire x1="0" y1="2.54" x2="0" y2="2.032" width="0.1524" layer="94"/>
1411+
<wire x1="0" y1="0" x2="0" y2="0.508" width="0.1524" layer="94"/>
1412+
<text x="1.524" y="2.921" size="1.778" layer="95" font="vector">&gt;NAME</text>
1413+
<text x="1.524" y="-2.159" size="1.778" layer="96" font="vector">&gt;VALUE</text>
1414+
<rectangle x1="-2.032" y1="0.508" x2="2.032" y2="1.016" layer="94"/>
1415+
<rectangle x1="-2.032" y1="1.524" x2="2.032" y2="2.032" layer="94"/>
1416+
<pin name="1" x="0" y="5.08" visible="off" length="short" direction="pas" swaplevel="1" rot="R270"/>
1417+
<pin name="2" x="0" y="-2.54" visible="off" length="short" direction="pas" swaplevel="1" rot="R90"/>
1418+
</symbol>
14081419
</symbols>
14091420
<devicesets>
14101421
<deviceset name="ESP32">
@@ -1748,12 +1759,12 @@ Chip antenna with ground or secondary connection. Common with larger metal RF co
17481759
<connect gate="G$1" pin="(VSPIWP/HS2_CLK)GPIO22" pad="39"/>
17491760
<connect gate="G$1" pin="32K_XN(GPIO33/ADC1:5/TOUCH8/RTC8)" pad="13"/>
17501761
<connect gate="G$1" pin="32K_XP(GPIO32/ADC1:4/TOUCH9/RTC9)" pad="12"/>
1751-
<connect gate="G$1" pin="CAP_10N" pad="48"/>
1762+
<connect gate="G$1" pin="CAP1" pad="48"/>
1763+
<connect gate="G$1" pin="CAP2" pad="47"/>
17521764
<connect gate="G$1" pin="CHIP_PU" pad="9"/>
17531765
<connect gate="G$1" pin="GND" pad="EP"/>
17541766
<connect gate="G$1" pin="GPIO23" pad="36"/>
17551767
<connect gate="G$1" pin="LNA_IN" pad="2"/>
1756-
<connect gate="G$1" pin="RES_14K" pad="47"/>
17571768
<connect gate="G$1" pin="SENSOR_CAPN(GPI38/ADC1:2/RTC2)" pad="7"/>
17581769
<connect gate="G$1" pin="SENSOR_CAPP(GPI37/ADC1:1/RTC1)" pad="6"/>
17591770
<connect gate="G$1" pin="SENSOR_VN(GPI39/ADC1:3/RTC3)" pad="8"/>
@@ -1774,6 +1785,27 @@ Chip antenna with ground or secondary connection. Common with larger metal RF co
17741785
</device>
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</devices>
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</deviceset>
1788+
<deviceset name="3.0NF" prefix="C">
1789+
<description>&lt;h3&gt;3.0nF (3nF, 3000pF) ceramic capacitors&lt;/h3&gt;
1790+
&lt;p&gt;A capacitor is a passive two-terminal electrical component used to store electrical energy temporarily in an electric field.&lt;/p&gt;</description>
1791+
<gates>
1792+
<gate name="G$1" symbol="CAP-1" x="0" y="0"/>
1793+
</gates>
1794+
<devices>
1795+
<device name="-0603-50V-5%" package="0603">
1796+
<connects>
1797+
<connect gate="G$1" pin="1" pad="1"/>
1798+
<connect gate="G$1" pin="2" pad="2"/>
1799+
</connects>
1800+
<technologies>
1801+
<technology name="">
1802+
<attribute name="PROD_ID" value="CAP-13515"/>
1803+
<attribute name="VALUE" value="3.0nF"/>
1804+
</technology>
1805+
</technologies>
1806+
</device>
1807+
</devices>
1808+
</deviceset>
17771809
</devicesets>
17781810
</library>
17791811
</drawing>

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