Lightning talk on Java Memory Consistency Model Java Day Kiev 2014

@LAFK_pl, Polish JUG, May 2014 2

MANAGEMENT!! @LAFK_pl, Polish JUG, May 2014 3

Posted in 2012... @LAFK_pl, Polish JUG, May 2014 4

... and still not corrected @LAFK_pl, Polish JUG, May 2014 5

Leslie Lamport ● Distributed system clocks ● Happens-before ● Sequential Consistency @LAFK_pl, Polish JUG, May 2014 6

Bill Pugh ● FindBugs ● Java Memory Model is broken ● Final - Volatile ● Double-checked locking ● New JMM @LAFK_pl, Polish JUG, May 2014 7

Sarita Adve ● Java Memory Model is broken ● Number of great papers on memory (consistency) models ● Best definition of MCM I found @LAFK_pl, Polish JUG, May 2014 8

Within these 15-20 minutes Intro Memory model means? Hardware Java stuff @LAFK_pl, Polish JUG, May 2014 9

Memory model? If NOT about GC then... what's it about? @LAFK_pl, Polish JUG, May 2014 10

Memory CONSISTENCY ● Allowed optimizations ● Possible behaviours / executions of a (possibly multithreaded!) program ● Which cores / threads see which values ● How to make it consistent for us, programmers @LAFK_pl, Polish JUG, May 2014 11

Where it matters? ● Javac / Jython / ... ● JIT ● Hardware of course ● So JMM is a LANGUAGE memory consistency model @LAFK_pl, Polish JUG, May 2014 14

Hardware ● CISC or RISC CPU ● Number of registers ● Caches size or type ● How many functional units per CPU @LAFK_pl, Polish JUG, May 2014 15 ● Pipeline: ● Instruction decode > address decode > memory fetch > register fetch > compute ...

Program / code optimizations? @LAFK_pl, Polish JUG, May 2014 16 ● Reorder ● (e.g. prescient store) ● Remove what's unnecessary ● (e.g. synchronize) ● Replace instructions / shorten machine code ● Function optimizations ● (e.g. Inlining) ● ...

Exemplary CPU @LAFK_pl, Polish JUG, May 2014 17

Barriers / fences „once memory has been pushed to the cache then a protocol of messages will occur to ensure all caches are coherent for any shared data. The techniques for making memory visible from a processor core are known as memory barriers or fences. – Martin Thompson, Mechanical Sympathy differs per architecture / CPU / cache type! @LAFK_pl, Polish JUG, May 2014 18

Barriers / Fences ● CPU instruction ● Means „Flush now!” ● Forces update ● Starts cache coherency protocols ● Read / Write / Full @LAFK_pl, Polish JUG, May 2014 19

Summarizing Java Language Spec: ● Describes whether the execution trace is a legal execution of the program ● Works by examining each read and checking write observed by that read ● Write is valid when it follows certain rules ● Describes possible behaviours of the program ● Implementor adhering to above can optimize code as he likes @LAFK_pl, Polish JUG, May 2014 21

What rules? ● Write is valid when it follows certain rules @LAFK_pl, Polish JUG, May 2014 22

Before, or after? @LAFK_pl, Polish JUG, May 2014 23

Before, or after? @LAFK_pl, Polish JUG, May 2014 24

Reordering - classic example Class Reordering { int x = 0, y = 0; public void writer() { @LAFK_pl, Polish JUG, May 2014 26 x = 1; y = 2; } public void reader() { int r1 = y; // HERE: y == 2 => x == ? int r2 = x; } }

What was wrong with old JM(C)M? You took a look, read the specs entire and... @LAFK_pl, Polish JUG, May 2014 27

New Java Memory Model ● SC on single-core and single-thread CPU is fine but it doesn't cut it now ● To ensure visibility, JVM JMM spec ensures: @LAFK_pl, Polish JUG, May 2014 29 ● final ● volatile ● synchronized are done well this time

Barriers in Java – rules @LAFK_pl, Polish JUG, May 2014 30 ● JMM ● volatile – sfence after write, lfence before read ● final – sfence after init (field visibility) ● Atomic instructions (like lock) = mfence

Further topics ● Why MCM and not a threading library? H.Boehm ● Better MCM? Sarita Adve ● Possible optimizations and their gains ● Performance of Java and hardware MCMs? Clashes? ● JMCM rules in more detail @LAFK_pl, Polish JUG, May 2014 31

Lightning talk on Java Memory Consistency Model Java Day Kiev 2014

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Lightning talk on Java Memory Consistency Model Java Day Kiev 2014