Faculty of

Engineering

ECE203
Digital Logic Design

Chapter 1
Digital Systems and Binary Numbers

Dr. Ahmed Mohamed Abdeltawab

Electronics and Communication Department

ECE 203 Digital Logic Design Ch1-1

Faculty of
Objectives Engineering

❑ Understand theory of operation for most of

digital electronic devices.
❑ Analyzing how can a digital computer perform
the complex operations based on simply
manipulating bits (zeros and ones).
❑ Design of digital logic systems.

ECE 203 Digital Logic Design Ch1-2

Faculty of
Engineering
ECE203: Logic Design

Week-1: Introduction
Week-2: Digital Systems and Binary Numbers Sheet 1

Week-3: Boolean Algebra and Logic Gates Sheet 2

Week-4: Quiz1
Week-5: Gate ‐ Level Minimization Sheet 3

Week-6: Combinational Logic Sheet 4

Week-7: Quiz 2
Week-8: Synchronous Sequential Logic Sheet 5

Week-9: Registers and Counters Sheet 6

Week-10: Memory and Programmable Logic

Week-11: Design at the Register Transfer Level
Week-12: Final Project

ECE 203 Digital Logic Design Ch1-3

Faculty of
COURSES AND RATINGS Engineering

Quiz-1: 20
Quiz-2: 20
CW 20
Total CW 40% 60
Final 60% 90
Total 150

ECE 203 Digital Logic Design Ch1-4

Faculty of
Engineering

ECE 203 Digital Logic Design Ch1-5

Faculty of
FPGA Digital Design Engineering

RTL Design: HDLs → Verilog, VHDL, SystemVerilog

ECE 203 Digital Logic Design Ch1-6
Faculty of
CPU – SoC architectures Engineering

Pulpino SoC: ETH Pulp Team CVA6 RISC-V CPU: OPENHWGROUP

ECE 203 Digital Logic Design Ch1-7

Faculty of
CPU – SoC architectures Engineering

MICROCHIP POLARFIRE SoC

XILINX ZYNQ SoC
ECE 203 Digital Logic Design Ch1-8
Faculty of
Digital Communication Engineering

Görsel “Digital Communications – Harris, Sklar”

ECE 203 Digital Logic Design Ch1-9
Outline of Chapter 1
Faculty of
Engineering

 1.1 Digital Systems

 1.2 Binary Numbers
 1.3 Number-base Conversions
 1.4 Octal and Hexadecimal Numbers
 1.5 Complements
 1.6 Signed Binary Numbers
 1.7 Binary Codes
 1.8 Binary Storage and Registers
 1.9 Binary Logic

ECE 203 Digital Logic Design Ch1-10

Digital Systems and Binary Numbers
Faculty of
Engineering

 Digital age and information age

 Digital computers
◆ General purposes
◆ Many scientific, industrial and commercial applications
 Digital systems
◆ Telephone switching exchanges
◆ Digital camera
◆ Electronic calculators, PDA's
◆ Digital TV
 Discrete information-processing systems
◆ Manipulate discrete elements of information
◆ For example, {1, 2, 3, …} and {A, B, C, …}…

ECE 203 Digital Logic Design Ch1-11

Analog and Digital Signal
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Engineering

 Analog system
◆ The physical quantities or signals may vary continuously over a specified
range.
 Digital system
◆ The physical quantities or signals can assume only discrete values.
◆ Greater accuracy
X(t) X(t)

t t
ECE 203 Analog signal Digital signal Digital Logic Design Ch1-12
Binary Digital Signal
Faculty of
Engineering

 An information variable represented by physical quantity.

 For digital systems, the variable takes on discrete values.
◆ Two level, or binary values are the most prevalent values.
 Binary values are represented abstractly by:
◆ Digits 0 and 1
◆ Words (symbols) False (F) and True (T) V(t)
◆ Words (symbols) Low (L) and High (H)
◆ And words On and Off
Logic 1
 Binary values are represented by values
or ranges of values of physical quantities. undefine

Logic 0
t
Binary digital signal

ECE 203 Digital Logic Design Ch1-13

Decimal Number System
Faculty of
Engineering

 Base (also called radix) = 10

◆ 10 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }
 Digit Position
◆ Integer & fraction 2 1 0 -1 -2

 Digit Weight 5 1 2 7 4
◆ Weight = (Base) Position
 Magnitude 100 10 1 0.1 0.01
◆ Sum of “Digit x Weight”
 Formal Notation
500 10 2 0.7 0.04

d2*B2+d1*B1+d0*B0+d-1*B-1+d-2*B-2

(512.74)10
ECE 203 Digital Logic Design Ch1-14
Octal Number System
Faculty of
Engineering

 Base = 8
◆ 8 digits { 0, 1, 2, 3, 4, 5, 6, 7 }
 Weights
◆ Weight = (Base) Position 64 8 1 1/8 1/64

 Magnitude 5 1 2 7 4
◆ Sum of “Digit x Weight”
2 1 0 -1 -2
 Formal Notation
5 *82+1 *81+2 *80+7 *8-1+4 *8-2
=(330.9375)10

(512.74)8

ECE 203 Digital Logic Design Ch1-15

Binary Number System
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Engineering

 Base = 2
◆ 2 digits { 0, 1 }, called binary digits or “bits”
 Weights
◆ Weight = (Base) Position 4 2 1 1/2 1/4

 Magnitude 1 0 1 0 1
◆ Sum of “Bit x Weight” 2 1 0 -1 -2
 Formal Notation 1 *2 2
+0 *2 1
+1 *2 0
+0 *2 -1
+1 *2 -
2
 Groups of bits 4 bits = Nibble
8 bits = Byte =(5.25)10
(101.01)2
1011

11000101
ECE 203 Digital Logic Design Ch1-16
Hexadecimal Number System
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Engineering

 Base = 16
◆ 16 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F }
 Weights
◆ Weight = (Base) Position 256 16 1 1/16 1/256

 Magnitude 1 E 5 7 A
◆ Sum of “Digit x Weight”
2 1 0 -1 -2
 Formal Notation
1 *162+14 *161+5 *160+7 *16-1+10 *16-2
=(485.4765625)10

(1E5.7A)16

ECE 203 Digital Logic Design Ch1-17

The Power of 2
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Engineering

n 2n n 2n
0 20=1 8 28=256
1 21=2 9 29=512
2 22=4 10 210=1024 Kilo

3 23=8 11 211=2048
4 24=16 12 212=4096
5 25=32 20 220=1M Mega

6 26=64 30 230=1G Giga

7 27=128 40 240=1T Tera

ECE 203 Digital Logic Design Ch1-18

Addition
Faculty of
Engineering

 Decimal Addition

1 1 Carry
5 5
+ 5 5

1 1 0
= Ten ≥ Base
➔ Subtract a Base

ECE 203 Digital Logic Design Ch1-19

Binary Addition
Faculty of
Engineering

 Column Addition

1 1 1 1 1 1
1 1 1 1 0 1 = 61
+ 1 0 1 1 1 = 23

1 0 1 0 1 0 0 = 84

≥ (2)10

ECE 203 Digital Logic Design Ch1-20

Binary Subtraction
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Engineering

 Borrow a “Base” when needed

1 2 = (10)2
0 2 2 0 0 2
1 0 0 1 1 0 1 = 77
− 1 0 1 1 1 = 23

0 1 1 0 1 1 0 = 54

ECE 203 Digital Logic Design Ch1-21

Binary Multiplication
Faculty of
Engineering

 Bit by bit

1 0 1 1 1
x 1 0 1 0
0 0 0 0 0
1 0 1 1 1
0 0 0 0 0
1 0 1 1 1

1 1 1 0 0 1 1 0

ECE 203 Digital Logic Design Ch1-22

Number Base Conversions
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Engineering

Evaluate
Magnitude
Octal
(Base 8)

Evaluate
Magnitude
Decimal Binary
(Base 10) (Base 2)

Hexadecimal
(Base 16)
Evaluate
Magnitude
ECE 203 Digital Logic Design Ch1-23
Decimal (Integer) to Binary Conversion
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Engineering

 Divide the number by the ‘Base’ (=2)

 Take the remainder (either 0 or 1) as a coefficient
 Take the quotient and repeat the division

Example: (13)10
Quotient Remainder Coefficient
13 / 2 = 6 1 a0 = 1
6 /2= 3 0 a1 = 0
3 /2= 1 1 a2 = 1
1 /2= 0 1 a3 = 1
Answer: (13)10 = (a3 a2 a1 a0)2 = (1101)2

MSB LSB
ECE 203 Digital Logic Design Ch1-24
Decimal (Fraction) to Binary Conversion
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Engineering

 Multiply the number by the ‘Base’ (=2)

 Take the integer (either 0 or 1) as a coefficient
 Take the resultant fraction and repeat the division

Example: (0.625)10
Integer Fraction Coefficient
0.625 * 2 = 1 . 25 a-1 = 1
0.25 * 2 = 0 . 5 a-2 = 0
0.5 *2= 1 . 0 a-3 = 1
Answer: (0.625)10 = (0.a-1 a-2 a-3)2 = (0.101)2

MSB LSB

ECE 203 Digital Logic Design Ch1-25

Decimal to Octal Conversion
Faculty of
Engineering

Example: (175)10
Quotient Remainder Coefficient
175 / 8 = 21 7 a0 = 7
21 / 8 = 2 5 a1 = 5
2 /8= 0 2 a2 = 2
Answer: (175)10 = (a2 a1 a0)8 = (257)8

Example: (0.3125)10
Integer Fraction Coefficient
0.3125 * 8 = 2 . 5 a-1 = 2
0.5 *8= 4 . 0 a-2 = 4
Answer: (0.3125)10 = (0.a-1 a-2 a-3)8 = (0.24)8

ECE 203 Digital Logic Design Ch1-26

Binary − Octal Conversion
Faculty of
Engineering

Octal Binary
 8 = 23
 Each group of 3 bits represents an octal 0 000
digit 1 001
2 010
Assume Zeros
Example: 3 011

( 1 0 1 1 0 . 0 1 )2 4 100
5 101
6 110
( 2 6 . 2 )8 7 111

Works both ways (Binary to Octal & Octal to Binary)

ECE 203 Digital Logic Design Ch1-27
Binary − Hexadecimal Conversion
Faculty of
Engineering

Hex Binary
 16 = 24 0 0000
1 0001
 Each group of 4 bits represents a 2 0010
hexadecimal digit 3 0011
4 0100
5 0101
Assume Zeros 6 0110
Example: 7 0111
8 1000
( 1 0 1 1 0 . 0 1 )2 9 1001
A 1010
B 1011
C 1100
D 1101
(1 6 . 4 )16 E 1110
F 1111

Works both ways (Binary to Hex & Hex to Binary)

ECE 203 Digital Logic Design Ch1-28
Octal − Hexadecimal Conversion
Faculty of
Engineering

 Convert to Binary as an intermediate step

Example:
( 2 6 . 2 )8

Assume Zeros Assume Zeros

( 0 1 0 1 1 0 . 0 1 0 )2

(1 6 . 4 )16

Works both ways (Octal to Hex & Hex to Octal)

ECE 203 Digital Logic Design Ch1-29
Decimal, Binary, Octal and Hexadecimal
Faculty of
Engineering

Decimal Binary Octal Hex

00 0000 00 0
01 0001 01 1
02 0010 02 2
03 0011 03 3
04 0100 04 4
05 0101 05 5
06 0110 06 6
07 0111 07 7
08 1000 10 8
09 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F

ECE 203 Digital Logic Design Ch1-30

1.5 Complements
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Engineering

 There are two types of complements for each base-r system: the radix complement and
diminished radix complement.
 Diminished Radix Complement - (r-1)’s Complement
◆ Given a number N in base r having n digits, the (r–1)’s complement of N is
defined as:
(rn –1) – N
 Example for 6-digit decimal numbers:
◆ 9’s complement is (rn – 1)–N = (106–1)–N = 999999–N
◆ 9’s complement of 546700 is 999999–546700 = 453299
 Example for 7-digit binary numbers:
◆ 1’s complement is (rn – 1) – N = (27–1)–N = 1111111–N
◆ 1’s complement of 1011000 is 1111111–1011000 = 0100111
 Observation:
◆ Subtraction from (rn – 1) will never require a borrow
◆ Diminished radix complement can be computed digit-by-digit
◆
ECE 203 For binary: 1 – 0 = 1 and 1 – 1 = 0 Digital Logic Design Ch1-31
Complements
Faculty of
Engineering

 1’s Complement (Diminished Radix Complement)

◆ All ‘0’s become ‘1’s
◆ All ‘1’s become ‘0’s

Example (10110000)2
 (01001111)2
If you add a number and its 1’s complement …

10110000
+ 01001111
11111111

ECE 203 Digital Logic Design Ch1-32

Complements
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Engineering

 Radix Complement

The r's complement of an n-digit number N in base r is defined as

rn – N for N ≠ 0 and as 0 for N = 0. Comparing with the (r − 1) 's
complement, we note that the r's complement is obtained by adding 1
to the (r − 1) 's complement, since rn – N = [(rn − 1) – N] + 1.

 Example: Base-10

The 10's complement of 012398 is 987602

The 10's complement of 246700 is 753300

 Example: Base-2

The 2's complement of 1101100 is 0010100

The 2's complement of 0110111 is 1001001

ECE 203 Digital Logic Design Ch1-33

Complements
Faculty of
Engineering

 2’s Complement (Radix Complement)

◆Take 1’s complement then add 1
OR ◆ Toggle all bits to the left of the first ‘1’ from the right
Example:
Number:
1’s Comp.:
10110000 10110000
01001111
+ 1
01010000 01010000

ECE 203 Digital Logic Design Ch1-34

Complements
Faculty of
Engineering

 Subtraction with Complements

◆ The subtraction of two n-digit unsigned numbers M – N in base r can be
done as follows:

ECE 203 Digital Logic Design Ch1-35

Complements
Faculty of
Engineering

 Example 1.5
◆ Using 10's complement, subtract 72532 – 3250.

 Example 1.6
◆ Using 10's complement, subtract 3250 – 72532.

There is no end carry.

Therefore, the answer is – (10's complement of 30718) = − 69282.

ECE 203 Digital Logic Design Ch1-36
Complements
Faculty of
Engineering

 Example 1.7
◆ Given the two binary numbers X = 1010100 and Y = 1000011, perform the
subtraction (a) X – Y ; and (b) Y − X, by using 2's complement.

There is no end carry.

Therefore, the answer is
Y – X = − (2's complement
of 1101111) = − 0010001.

ECE 203 Digital Logic Design Ch1-37

Complements
Faculty of
Engineering

 Subtraction of unsigned numbers can also be done by means of the (r − 1)'s

complement. Remember that the (r − 1) 's complement is one less then the r's
complement.
 Example 1.8
◆ Repeat Example 1.7, but this time using 1's complement.

There is no end carry,

Therefore, the answer is Y –
X = − (1's complement of
1101110) = − 0010001.
ECE 203 Digital Logic Design Ch1-38
1.6 Signed Binary Numbers
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Engineering

 To represent negative integers, we need a notation for negative

values.
 It is customary to represent the sign with a bit placed in the
leftmost position of the number since binary digits.
 The convention is to make the sign bit 0 for positive and 1 for
negative.
 Example:

 Table 1.3 lists all possible four-bit signed binary numbers in the
three representations.
ECE 203 Digital Logic Design Ch1-39
Signed Binary Numbers
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Engineering

ECE 203 Digital Logic Design Ch1-40

Signed Binary Numbers
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Engineering

 Arithmetic addition
◆ The addition of two numbers in the signed-magnitude system follows the rules of
ordinary arithmetic. If the signs are the same, we add the two magnitudes and
give the sum the common sign. If the signs are different, we subtract the smaller
magnitude from the larger and give the difference the sign if the larger magnitude.
◆ The addition of two signed binary numbers with negative numbers represented in
signed-2's-complement form is obtained from the addition of the two numbers,
including their sign bits.
◆ A carry out of the sign-bit position is discarded.

 Example:

ECE 203 Digital Logic Design Ch1-41

Signed Binary Numbers
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Engineering

 Arithmetic Subtraction
◆ In 2’s-complement form:
1. Take the 2’s complement of the subtrahend (including the sign bit)
and add it to the minuend (including sign bit).
2. A carry out of sign-bit position is discarded.

(  A) − ( + B) = (  A) + ( − B)
(  A) − ( − B) = (  A) + ( + B)
 Example:

(− 6) − (− 13) (11111010 − 11110011)

(11111010 + 00001101)
00000111 (+ 7)
ECE 203 Digital Logic Design Ch1-42
1.7 Binary Codes
Faculty of
Engineering

 BCD Code
◆ A number with k decimal digits will
require 4k bits in BCD.
◆ Decimal 396 is represented in BCD
with 12bits as 0011 1001 0110, with
each group of 4 bits representing one
decimal digit.
◆ A decimal number in BCD is the
same as its equivalent binary number
only when the number is between 0
and 9.
◆ The binary combinations 1010
through 1111 are not used and have
no meaning in BCD.

ECE 203 Digital Logic Design Ch1-43

Binary Code
Faculty of
Engineering

 Example:
◆ Consider decimal 185 and its corresponding value in BCD and binary:

 BCD addition

ECE 203 Digital Logic Design Ch1-44

Binary Code
Faculty of
Engineering

 Example:
◆ Consider the addition of 184 + 576 = 760 in BCD:

 Decimal Arithmetic: (+375) + (-240) = +135

Hint 6: using 10’s of BCD

ECE 203 Digital Logic Design Ch1-45

Binary Codes
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 Other Decimal Codes

ECE 203 Digital Logic Design Ch1-46

Binary Codes)
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 Gray Code
◆ The advantage is that only bit in the
code group changes in going from
one number to the next.
» Error detection.
» Representation of analog data.
» Low power design.

000 001

010 011
100 101

110 111

ECE 203
1-1 and onto!! Digital Logic Design Ch1-47
Binary Codes
Faculty of
Engineering

 American Standard Code for Information Interchange (ASCII) Character Code

ECE 203 Digital Logic Design Ch1-48

Binary Codes
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Engineering

 ASCII Character Code

ECE 203 Digital Logic Design Ch1-49

ASCII Character Codes
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Engineering

 American Standard Code for Information Interchange (Refer to

Table 1.7)
 A popular code used to represent information sent as character-
based data.
 It uses 7-bits to represent:
◆ 94 Graphic printing characters.
◆ 34 Non-printing characters.
 Some non-printing characters are used for text format (e.g. BS =
Backspace, CR = carriage return).
 Other non-printing characters are used for record marking and
flow control (e.g. STX and ETX start and end text areas).

ECE 203 Digital Logic Design Ch1-50

ASCII Properties
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Engineering

 ASCII has some interesting properties:

◆ Digits 0 to 9 span Hexadecimal values 3016 to 3916
◆ Upper case A-Z span 4116 to 5A16
◆ Lower case a-z span 6116 to 7A16
» Lower to upper case translation (and vice versa) occurs by flipping bit 6.

ECE 203 Digital Logic Design Ch1-51

Binary Codes
Faculty of
Engineering

 Error-Detecting Code
◆ To detect errors in data communication and processing, an eighth bit is
sometimes added to the ASCII character to indicate its parity.
◆ A parity bit is an extra bit included with a message to make the total
number of 1's either even or odd.
 Example:
◆ Consider the following two characters and their even and odd parity:

ECE 203 Digital Logic Design Ch1-52

Binary Codes
Faculty of
Engineering

 Error-Detecting Code
◆ Redundancy (e.g. extra information), in the form of extra bits, can be
incorporated into binary code words to detect and correct errors.
◆ A simple form of redundancy is parity, an extra bit appended onto the code
word to make the number of 1’s odd or even. Parity can detect all single-
bit errors and some multiple-bit errors.
◆ A code word has even parity if the number of 1’s in the code word is even.
◆ A code word has odd parity if the number of 1’s in the code word is odd.
◆ Example:

Message A: 100010011 (even parity)

Message B: 10001001 0 (odd parity)

ECE 203 Digital Logic Design Ch1-53

1.8 Binary Storage and Registers
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 Registers
◆ A binary cell is a device that possesses two stable states and is capable of storing
one of the two states.
◆ A register is a group of binary cells. A register with n cells can store any discrete
quantity of information that contains n bits.

n cells 2n possible states

 A binary cell
◆ Two stable state
◆ Store one bit of information
◆ Examples: flip-flop circuits, ferrite cores, capacitor
 A register
◆ A group of binary cells
◆ AX in x86 CPU
 Register Transfer
◆ A transfer of the information stored in one register to another.
◆ One of the major operations in digital system.
◆ An example in next slides.

ECE 203 Digital Logic Design Ch1-54

A Digital Computer Example
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Engineering

Memory

Control
CPU unit Datapath

Inputs: Keyboard, Outputs: CRT,

mouse, modem, LCD, modem,
Input/Output speakers
microphone
Synchronous or
Asynchronous?
ECE 203 Digital Logic Design Ch1-55
Transfer of information
Faculty of
Engineering

ECE 203 Figure 1.1 Transfer of information among register Digital Logic Design Ch1-56
Transfer of information
Faculty of
Engineering

 The other major component

of a digital system
◆ Circuit elements to
manipulate individual bits of
information
◆ Load-store machine
LD R1;
LD R2;
ADD R3, R2, R1;
SD R3;

Figure
ECE 203 1.2 Example of binary information processing Digital Logic Design Ch1-57
1.9 Binary Logic
Faculty of
Engineering

 Definition of Binary Logic

◆ Binary logic consists of binary variables and a set of logical operations.

◆ The variables are designated by letters of the alphabet, such as A, B, C, x, y, z, etc,

with each variable having two and only two distinct possible values: 1 and 0,
◆ Three basic logical operations: AND, OR, and NOT.

ECE 203 Digital Logic Design Ch1-58

Binary Logic
Faculty of
Engineering

 Truth Tables, Boolean Expressions, and Logic Gates

AND OR NOT
x y z x y z x z
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1

z=x•y=xy z=x+y z = x = x’

x x x
y z y z z
ECE 203 Digital Logic Design Ch1-59
Switching Circuits
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Engineering

AND OR

ECE 203 Digital Logic Design Ch1-60

Binary Logic
Faculty of
Engineering

 Logic gates
◆ Example of binary signals

3
Logic 1
2
Un-define
1
Logic 0
0

ECE 203 Figure 1.3 Example of binary signals Digital Logic Design Ch1-61
Binary Logic
Faculty of
Engineering

 Logic gates
◆ Graphic Symbols and Input-Output Signals for Logic gates:

Fig. 1.4 Symbols for digital logic circuits

ECE 203 Fig. 1.5 Input-Output signals for gates Digital Logic Design Ch1-62
Binary Logic
Faculty of
Engineering

 Logic gates
◆ Graphic Symbols and Input-Output Signals for Logic gates:

Fig. 1.6 Gates with multiple inputs

ECE 203 Digital Logic Design Ch1-63