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Siemens PLC: Chapter Five

The document discusses the structure and operation of Siemens S7-200 PLCs. It describes the PLC cycle and how inputs are read and used to process the control program. It also covers addressing different memory areas like inputs, outputs, bits, timers and counters. Finally, it explains common bit logic instructions like contacts, coils, reset/set coils, and edge detection used in ladder logic programs.

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0% found this document useful (0 votes)
255 views25 pages

Siemens PLC: Chapter Five

The document discusses the structure and operation of Siemens S7-200 PLCs. It describes the PLC cycle and how inputs are read and used to process the control program. It also covers addressing different memory areas like inputs, outputs, bits, timers and counters. Finally, it explains common bit logic instructions like contacts, coils, reset/set coils, and edge detection used in ladder logic programs.

Uploaded by

plcmana
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOC, PDF, TXT or read online on Scribd
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Chapter Five

Siemens PLC

Structure of S7-200

PLC Course

chapter five

Terminal Diagram of the S7-200 : 2

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The PLC Cycle : 3

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All SIMATIC programmable controllers usually work in a cyclical manner. In this cyclical operation the switch statuses are read at the inputs and stored in the process input This information is subsequently used to feed and process the control program.

PLC Course Using the Memory Address to Access Data : -

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To access a bit in a memory area, you specify the address, which includes the memory area identifier, the byte address, and the bit number. Figure 7-1 shows an example of accessing a bit (which is also called byte.bit addressing). In this example, the memory area and byte address (I=input, and 3=byte 3) are followed by a period (.) to separate the bit address (bit 4).

Addressing the Process-Image Input Register (I) : the CPU samples the physical input points at the beginning of each scan cycle and writes these values to the process-image input register. You can access the process-image input register in bits, bytes, words, or double words. Format: Bit I[byte address].[bit address] Byte, Word, Double Word I[size][starting byte address] Addressing the Process-Image Output Register (Q) : At the end of the scan cycle, the CPU copies the values stored in the process-image output register to the physical output points. You can access the process-image output register in bits, bytes, words, or double words. Format: Bit Q[byte address].[bit address] Byte, Word, Double Word Q[size][starting byte address] Q1.1 QB5 I0.1 IB4

PLC Course Addressing the Bit Memory (M) Area : -

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You can use the internal memory bits (M memory) as control relays to store the intermediate status of an operation or other control information. While the name bit memory area implies that this information is stored in bit-length units, you can access the bit memory area not only in bits, but also in bytes, words, or double words. Format: Bit M[byte address].[bit address] Byte, Word, Double Word M[size][starting byte address] Addressing the Sequence Control Relay (S) Memory Area : Sequence Control Relay bits (S) are used to organize machine operations or steps into equivalent program segments. SCRs allow logical segmentation of the control program. You can access the S bits as bits, bytes, words, or double words. Format: Bit S[byte address].[bit address] Byte, Word, Double Word S[size][starting byte address] Addressing the Special Memory (SM) Bits : The SM bits provide a means for communicating information between the CPU and your program. You can use these bits to select and control some of the special functions of the S7-200 CPU, such as: _ A bit that turns on for the first scan _ Bits that toggle at fixed rates _ Bits that show the status of math or operational instructions Addressing the Timer (T) Memory Area : In the S7-200 CPU, timers are devices that count increments of time. The S7-200 timers have resolutions (time-base increments) of 1 ms, 10 ms, or 100 ms. There are two variables that are associated with a timer: _ Current value: this 16-bit signed integer stores the amount of time counted by the timer. S3.1 SB4 M26.7 MD20

PLC Course chapter five _ Timer bit: this bit turns on (is set to 1) when the current value of the timer is greater than or equal to the preset value. (The preset value is entered as part of the timer instruction.)You access both of these variables by using the timer address (T + timer number). Access to either the timer bit or the current value is dependent on the instruction used: instructions with bit operands access the timer bit, while instructions with word operands access the current value. As shown in Figure , the Normally Open Contact instruction accesses the timer bit, while the Move Word (MOV_W) instruction accesses the current value of the timer. Format: T[timer number] T 32

Addressing the Counter (C) Memory Area : In the S7-200 CPU, counters are devices that count each low-to-high transition event on the counter input(s). The CPU provides two types of counters: one type counts up only, and the other counts both up and down. There are two variables that are associated with a counter: _ Current value: this 16-bit signed integer stores the accumulated count. _ Counter bit: this bit turns on (is set to 1) when the current value of the counter is greater than or equal to the preset value. (The preset value is entered as part of the counter instruction.)

PLC Course Bit Logic Instructions : -

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Description :
Bit logic instructions work with two digits, 1 and 0. These two digits form the base of a number system called the binary system. The two digits 1 and 0 are called binary digits or bits. In the world of contacts and coils, a 1 indicates activated or energized, and a 0 indicates not activated or not energized. There are bit logic instructions to perform the following functions:

---| |--- Normally Open Contact (Address) ---| / |--- Normally Closed Contact (Address) ---(SAVE) Save RLO into BR Memory XOR Bit Exclusive OR ---( ) Output Coil ---( # )--- Midline Output ---|NOT|--- Invert Power Flow

The following instructions react to an RLO of 1: ---( S ) Set Coil ---( R ) Reset Coil SR Set-Reset Flip Flop RS Reset-Set Flip Flop

Other instructions react to a positive or negative edge transition to perform the following functions: ---(N)--- Negative RLO Edge Detection ---(P)--- Positive RLO Edge Detection NEG Address Negative Edge Detection POS Address Positive Edge Detection

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XOR Bit Exclusive OR


For the XOR function, a network of normally open and normally closed contacts must be created as shown below.

---| |--- Normally Open Contact (Address)


---| |--- (Normally Open Contact) is closed when the bit value stored at the specified <address> is equal to "1". When the contact is closed, ladder ail power flows across the contact and the result of logic operation (RLO) = "1". Otherwise, if the signal state at the specified <address> is "0", the contact is open. When the contact is open, power does not flow across the contact and the result of logic operation (RLO) = "0".

PLC Course

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---| / |--- Normally Closed Contact (Address)


---| / |--- (Normally Closed Contact) is closed when the bit value stored at the specified <address> is equal to "0". When the contact is closed, ladder rail power flows across the contact and the result of logic operation (RLO) = "1". Otherwise, if the signal state at the specified <address> is "1", the contact is opened. When the contact is opened, power does not flow across the contact and the result of logic operation (RLO) = "0".

--|NOT|-- Invert Power Flow


---|NOT|--- (Invert Power Flow) negates the RLO bit.

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---( ) Output Coil


---( ) (Output Coil) works like a coil in a relay logic diagram. If there is power flow to the coil (RLO = 1), the bit at location <address> is set to "1". If there is no power flow to the coil (RLO = 0), the bit at location <address> is set to "0". An output coil can only be placed at the right end of a ladder rung. Multiple output elements (max. 16) are possible (see example). A negated output can be created by using the --- |NOT|--- (invert power flow) element.

---( # )--- Midline Output


---( # )--- (Midline Output) is an intermediate assigning element which saves the RLO bit (power flow status) to a specified <address>. The midline output element saves the logical result of the preceding branch elements. In series with other contacts, ---( # )--- is inserted like a contact. A ---( # )--- element may never be connected to the power rail or directly after a branch connection or at the end of a branch. A negated ---( # )--- can be created by using the ---|NOT|--- (invert power flow) element.

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---( R ) Reset Coil


---( R ) (Reset Coil) is executed only if the RLO of the preceding instructions is "1" (power flows to the coil). If power flows to the coil (RLO is "1"), the specified <address> of the element is reset to "0". A RLO of "0" (no power flow to the coil) has no effect and the state of the elements specified address remains unchanged. The <address> may also be a timer (T no.) whose timer value is reset to "0" or a counter (C no.) whose counter value is reset to "0".

The signal state of output Q4.0 is reset to "0" if one of the following conditions exists: The signal state is "1" at inputs I0.0 and I0.1 Or the signal state is "0" at input I0.2. If the RLO is "0", the signal state of output Q4.0 remains unchanged. The signal state of timer T1 is only reset if: the signal state is "1" at input I0.3. The signal state of counter C1 is only reset if: the signal state is "1" at input I0.4.

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---( S ) Set Coil


---( S ) (Set Coil) is executed only if the RLO of the preceding instructions is "1" (power flows to the coil). If the RLO is "1" the specified <address> of the element is set to "1". An RLO = 0 has no effect and the current state of the elements specified address remains unchanged.

The signal state of output Q4.0 is "1" if one of the following conditions exists: The signal state is "1" at inputs I0.0 and I0.1 Or the signal state is "0" at input I0.2. If the RLO is "0", the signal state of output Q4.0 remains unchanged.

---( N )--- Negative RLO Edge Detection


---( N )--- (Negative RLO Edge Detection) detects a signal change in the address from "1" to "0" and displays it as RLO = "1" after the instruction. The current signal state in the RLO is compared with the signal state of the address, the edge memory bit. If the signal state of the address is "1" and the RLO was "0" before the instruction, the RLO will be "0" (pulse) after this instruction, and "1" in all other cases. The RLO prior to the instruction is stored in the address.

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The edge memory bit M0.0 saves the old RLO state. When there is a signal change at the RLO from "1" to "0", the program jumps to label CAS1.

---( P )--- Positive RLO Edge Detection


---( P )--- (Positive RLO Edge Detection) detects a signal change in the address from "0" to "1" and displays it as RLO = "1" after the instruction. The current signal state in the RLO is compared with the signal state of the address, the edge memory bit. If the signal state of the address is "0" and the RLO was "1" before the instruction, the RLO will be "1" (pulse) after this instruction, and "0" in all other cases. The RLO prior to the instruction is stored in the address.

The edge memory bit M0.0 saves the old RLO state. When there is a signal change at the RLO from "0" to "1", the program jumps to label CAS1

EXAMPLE :14

PLC Course

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Example : -

The "coils" - (S) Set Q0.0 to "1" - (R) Reset Q0.0 to "0" . A "set" output or memory bit remains "set" until it is reset by the - (R) statement (becomes "untrue"). Pulse-Operated Switch : -

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Timer Instructions On Delay & Retentive On-Delay Timer : The On-Delay Timer (TON) and Retentive On-Delay Timer (TONR) instructions count time when the enabling input is on. The timer number (Txx) determines the resolution of the timer, and the resolution is now shown in the instruction box. Off-Delay Timer : The Off-Delay Timer (TOF) is used to delay turning an output off for a fixed period of time after the input turns off. The timer number (Txx) determines the resolution of the timer, and the resolution is now shown in the instruction box.

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PLC Course chapter five The TON and TONR instructions count time when the enabling input is on. When the current value is equal to or greater than the preset time, the timer bit is on. 1- The current value of a TON timer is cleared when the enabling input is off, whereas the current value of the TONR timer is maintained when the input is off. 2- You can use the TONR timer to accumulate time when the input turns on and off. Use the Reset instruction (R) to clear the current value of the TONR. 3- Both the TON and the TONR timers continue counting after the preset is reached, and they stop counting at the maximum value of 32,767. The TOFF instruction is used to delay turning an output off for a fixed period of time after the input turns off. When the enabling input turns on, the timer bit turns on immediately, and the current value is set to 0. When the input turns off, the timer counts until the elapsed time reaches the preset time. 1- When the preset is reached, the timer bit turns off and the current value stops incrementing; however, if the input turns on again before the TOF reaches the preset value, the timer bit remains on. 2- The enabling input must make an on-to-off transition for the TOF to begin counting time intervals. 3- If the TOF timer is inside an SCR region and the SCR region is inactive, then the current value is set to 0, the timer bit is turned off, and the current value does not increment.

On-Delay Timer Function : -

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Self Resetting timer : -

Retentive On-Delay Timer Function : 18

PLC Course

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off delay timer : -

Counter Instructions
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PLC Course Count Up Counter : -

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The Count Up instruction (CTU) counts up from the current value each time the count up (CU) input makes the transition from off to on. When the current value Cxx is greater than or equal to the preset value PV, the counter bit Cxx turns on. The counter is reset when the Reset (R) input turns on, or when the Reset instruction is executed. The counter stops counting when it reaches the maximum value (32,767). Count Down Counter : The Count Down instruction (CTD) counts down from the current value of that counter each time the count down (CD) input makes the transition from off to on. When the current value Cxx is equal to 0, the counter bit Cxx turns on. The counter resets the counter bit Cxx and loads the current value with the preset value PV when the load input LD turns on. The counter stops upon reaching zero, and the counter bit Cxx turns on. Count Up/Down Counter : The Count Up/Down instruction (CTUD) counts up each time the count up (CU) input makes the transition from off to on, and counts down each time the count down (CD) input makes the transition from off to on. The current value Cxx of the counter maintains the current count. The preset value PV is compared to the current value each time the counter instruction is executed. Upon reaching maximum value (32,767), the next rising edge at the count up input causes the current count to wrap around to the minimum value (--32,768). On reaching the minimum value (--32,768), the next rising edge at the count down input causes the current count to wrap around to the maximum value (32,767). When the current value Cxx is greater than or equal to the preset value PV, the counter bit Cxx turns on. Otherwise, the counter bit turns off. The counter is reset when the Reset (R) input turns on, or when the Reset instruction is executed. The CTUD counter stops counting when it reaches PV.

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Move Instructions Move Byte, Word, Double Word, or Real : The Move Byte (MOVB),Move Word (MOVW),Move Double Word (MOVD), and Move Real (MOVR) instructions move a value from a memory location IN to a new memory location OUT without changing the original value.

Block Move Instructions : Block Move Byte, Word, or Double Word The Block Move Byte (BMB), Block Move Word (BMW), and Block Move Double Word (BMD) instructions move a specified amount of data to a new memory location by moving the number of bytes, words, or double words N starting at the input address IN to a new block starting at the output address OUT. { N has a range of 1 to 255 } .

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Comparison Instructions Description : IN1 and IN2 are compared according to the type of comparison you choose: == IN1 is equal to IN2 <> IN1 is not equal to IN2 > IN1 is greater than IN2 < IN1 is less than IN2 >= IN1 is greater than or equal to IN2 <= IN1 is less than or equal to IN2 CMP ? I Compare Integer

Output Q4.0 is set if the following conditions exist:


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PLC Course There is a signal state of "1" at inputs I0.0 and at I0.1 AND MW0 >= MW2

chapter five

CMP ? D Compare Double Integer

Output Q4.0 is set if the following conditions exist: There is a signal state of "1" at inputs I0.0 and at I0.1 And MD0 >= MD4 And there is a signal state of"1" at input I0.2

CMP ? R Compare Real

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PLC Course

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Output Q4.0 is set if the following conditions exist: There is a signal state of "1" at inputs I0.0 and at I0.1 And MD0 >= MD4 And there is a signal state of"1" at input I0.

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