A Global Fabless Semiconductor Group Offering Connectivity IPs and Chiplet Design Turnkey Services




Egis Breaking News
InPsytech Tapes Out F2F SoIC Design Compliant with UCIE 2.0 Standard
InPsytech, a leading provider of high-speed semiconductor IP solutions and a member of the Egis Group, announced that it has successfully taped out its advanced design for TSMC’s Face-to-Face (F2F) SoIC technology, fully compliant with the UCIE 2.0 (Universal Chiplet Interconnect Express) standard. This milestone marks a significant achievement in enabling high-speed interconnects for heterogeneous chiplet integration.
────Design & Reuse 2025.07.16
────Design & Reuse 2025.07.16
Egis makes initial strides in South Korea as InPsytech joins SAFE
InPsytech, a leading provider of high-performance semiconductor intellectual property (IP) solutions under Egis, has beenselected to join the Samsung Advanced Foundry Ecosystem (SAFE) as an IP partner. This recognition stems from InPsytech’soutstanding performance in open NAND flash interface (ONFI) high-performance IP solutions. InPsytech plans to continueexpanding its IP portfolio within Samsung’s ecosystem, particularly by strengthening applications for UCIe IP.
────DIGITIMES Asia 2025.05.19
────DIGITIMES Asia 2025.05.19