Merge main to staging-sm-6.8 (microsoft#5968)

Merging main @ 5f87376 to staging-sm-6.8.

Author: tex3d

CONTRIBUTING.md

@@ -44,6 +44,8 @@ Here's a few things you should always do when making changes to the code base:
 
 The coding, style, and general engineering guidelines follow those described in the docs/CodingStandards.rst. For additional guidelines in code specific to HLSL, see the docs/HLSLChanges.rst file.
 
+DXC has adopted a clang-format requirement for all incoming changes. PRs to DXC should have the _changed code_ clang formatted to the LLVM style, and leave the remaining portions of the file unchanged. This can be done using the `git-clang-format` tool or IDE driven workflows. A GitHub action will run on all PRs to validate that the change is properly formatted.
+
 **Commit/Pull Request Format**
 
 ```

azure-pipelines.yml

@@ -34,10 +34,6 @@ stages:
  call utils\hct\hctstart.cmd %HLSL_SRC_DIR% %HLSL_BLD_DIR%
  call utils\hct\hcttest.cmd -$(configuration) noexec
  displayName: 'DXIL Tests'
- - script: |
- call utils\hct\hctstart.cmd %HLSL_SRC_DIR% %HLSL_BLD_DIR%
- call utils\hct\hcttest.cmd -$(configuration) spirv_only
- displayName: 'SPIRV Tests'
 
  - job: Nix
  timeoutInMinutes: 90

cmake/modules/HandleLLVMOptions.cmake

@@ -533,7 +533,11 @@ if(LLVM_USE_SANITIZER)
  message(WARNING "Unsupported value of LLVM_USE_SANITIZER: ${LLVM_USE_SANITIZER}")
  endif()
  else()
- message(WARNING "LLVM_USE_SANITIZER is not supported on this platform.")
+ if (LLVM_USE_SANITIZER STREQUAL "Address")
+ append("-fsanitize=address" CMAKE_C_FLAGS CMAKE_CXX_FLAGS)
+ else()
+ message(WARNING "Unsupported value of LLVM_USE_SANITIZER: ${LLVM_USE_SANITIZER}")
+ endif()
  endif()
  if (LLVM_USE_SANITIZE_COVERAGE)
  append("-fsanitize-coverage=edge,indirect-calls,8bit-counters,trace-cmp" CMAKE_C_FLAGS CMAKE_CXX_FLAGS)

docs/SPIR-V.rst

@@ -252,7 +252,7 @@ more than one shader_record_nv block statically used per shader entry point
 otherwise results are undefined."
 
 The official Khronos ray tracing extension also comes with a SPIR-V storage class
-that has the same functionality. The ``[[vk::shader_record_ext]]`` annotation can 
+that has the same functionality. The ``[[vk::shader_record_ext]]`` annotation can
 be used when targeting the SPV_KHR_ray_tracing extension.
 
 Builtin variables
@@ -297,10 +297,10 @@ Supported extensions
 * SPV_EXT_mesh_shader
 * SPV_EXT_shader_stencil_support
 * SPV_AMD_shader_early_and_late_fragment_tests
-* SPV_AMD_shader_explicit_vertex_parameter
 * SPV_GOOGLE_hlsl_functionality1
 * SPV_GOOGLE_user_type
 * SPV_NV_mesh_shader
+* SPV_KHR_fragment_shading_barycentric
 
 Vulkan specific attributes
 --------------------------
@@ -1279,6 +1279,39 @@ will be translated into
  %myBuffer1 = OpVariable %_ptr_Uniform_type_ByteAddressBuffer Uniform
  %myBuffer2 = OpVariable %_ptr_Uniform_type_RWByteAddressBuffer Uniform
 
+Rasterizer Ordered Views
+------------------------
+
+The following types are rasterizer ordered views:
+
+* ``RasterizerOrderedBuffer``
+* ``RasterizerOrderedByteAddressBuffer``
+* ``RasterizerOrderedStructuredBuffer``
+* ``RasterizerOrderedTexture1D``
+* ``RasterizerOrderedTexture1DArray``
+* ``RasterizerOrderedTexture2D``
+* ``RasterizerOrderedTexture2DArray``
+* ``RasterizerOrderedTexture3D``
+
+These are translated to the same types as their equivalent RW* types - for
+example, a ``RasterizerOrderedBuffer`` is translated to the same SPIR-V type as
+an ``RWBuffer``. The sole difference lies in how loads and stores to these
+values are treated.
+
+The access order guarantee made by ROVs is implemented in SPIR-V using the
+`SPV_EXT_fragment_shader_interlock <https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/EXT/SPV_EXT_fragment_shader_interlock.asciidoc>`_.
+When you load or store a value from or to a rasterizer ordered view, using
+either the ``Load*()`` or ``Store*()`` methods or the indexing operator,
+``OpBeginInvocationInterlockEXT`` will be inserted before the first access and
+``OpEndInvocationInterlockEXT`` will be inserted after the last access.
+
+An execution mode will be added to the entry point, depending on the sample
+frequency, which will be deduced based on the semantics inputted by the entry
+point. ``PixelInterlockOrderedEXT`` will be selected by default,
+``SampleInterlockOrderedEXT`` will be selected if the ``SV_SampleIndex``
+semantic is input, and ``ShadingRateInterlockOrderedEXT`` will be selected if
+the ``SV_ShadingRate`` semantic is input.
+
 HLSL Variables and Resources
 ============================
 
@@ -1550,7 +1583,7 @@ some system-value (SV) semantic strings will be translated into SPIR-V
 +---------------------------+-------------+----------------------------------------+-----------------------+-----------------------------+
 | SV_StencilRef | PSOut | ``FragStencilRefEXT`` | N/A | ``StencilExportEXT`` |
 +---------------------------+-------------+----------------------------------------+-----------------------+-----------------------------+
-| SV_Barycentrics | PSIn | ``BaryCoord*AMD`` | N/A | ``Shader``  |
+| SV_Barycentrics | PSIn | ``BaryCoord*KHR`` | N/A | ``FragmentBarycentricKHR`` |
 +---------------------------+-------------+----------------------------------------+-----------------------+-----------------------------+
 | | GSOut | ``Layer`` | N/A | ``Geometry`` |
 | +-------------+----------------------------------------+-----------------------+-----------------------------+
@@ -3858,14 +3891,14 @@ implicit ``vk`` namepsace.
 
  // Implicitly defined when compiling to SPIR-V.
  namespace vk {
- 
+
  const uint CrossDeviceScope = 0;
  const uint DeviceScope = 1;
  const uint WorkgroupScope = 2;
  const uint SubgroupScope = 3;
  const uint InvocationScope = 4;
  const uint QueueFamilyScope = 5;
- 
+
  uint64_t ReadClock(in uint scope);
  T RawBufferLoad<T = uint>(in uint64_t deviceAddress,
  in uint alignment = 4);
@@ -3918,20 +3951,20 @@ functionality to HLSL:
 
 .. code:: hlsl
 
- // RawBufferLoad and RawBufferStore use 'uint' for the default template argument. 
+ // RawBufferLoad and RawBufferStore use 'uint' for the default template argument.
  // The default alignment is 4. Note that 'alignment' must be a constant integer.
  T RawBufferLoad<T = uint>(in uint64_t deviceAddress, in uint alignment = 4);
  void RawBufferStore<T = uint>(in uint64_t deviceAddress, in T value, in uint alignment = 4);
 
 
-These intrinsics allow the shader program to load and store a single value with type T (int, float2, struct, etc...) 
+These intrinsics allow the shader program to load and store a single value with type T (int, float2, struct, etc...)
 from GPU accessible memory at given address, similar to ``ByteAddressBuffer.Load()``.
-Additionally, these intrinsics allow users to set the memory alignment for the underlying data. 
-We assume a 'uint' type when the template argument is missing, and we use a value of '4' for the default alignment. 
+Additionally, these intrinsics allow users to set the memory alignment for the underlying data.
+We assume a 'uint' type when the template argument is missing, and we use a value of '4' for the default alignment.
 Note that the alignment argument must be a constant integer if it is given.
 
-Though we do support setting the `alignment` of the data load and store, we do not currently 
-support setting the memory layout for the data. Since these intrinsics are supposed to load 
+Though we do support setting the `alignment` of the data load and store, we do not currently
+support setting the memory layout for the data. Since these intrinsics are supposed to load
 "arbitrary" data to or from a random device address, we assume that the program loads/stores some "bytes of data",
 but that its format or layout is unknown. Therefore, keep in mind that these intrinsics
 load or store ``sizeof(T)`` bytes of data, and that loading/storing data with a struct

external/SPIRV-Headers

@@ -42,9 +42,21 @@ class OP {
  OP() = delete;
  OP(llvm::LLVMContext &Ctx, llvm::Module *pModule);
 
- void RefreshCache();
+ // InitWithMinPrecision sets the low-precision mode and calls
+ // FixOverloadNames() and RefreshCache() to set up caches for any existing
+ // DXIL operations and types used in the module.
+ void InitWithMinPrecision(bool bMinPrecision);
+
+ // FixOverloadNames fixes the names of DXIL operation overloads, particularly
+ // when they depend on user defined type names. User defined type names can be
+ // modified by name collisions from multiple modules being loaded into the
+ // same llvm context, such as during module linking.
  void FixOverloadNames();
 
+ // RefreshCache places DXIL types and operation overloads from the module into
+ // caches.
+ void RefreshCache();
+
  llvm::Function *GetOpFunc(OpCode OpCode, llvm::Type *pOverloadType);
  const llvm::SmallMapVector<llvm::Type *, llvm::Function *, 8> &
  GetOpFuncList(OpCode OpCode) const;
@@ -80,8 +92,6 @@ class OP {
 
  // To check if operation uses strict precision types
  bool UseMinPrecision();
- // Set if operation uses strict precision types or not.
- void SetMinPrecision(bool bMinPrecision);
 
  // Get the size of the type for a given layout
  uint64_t GetAllocSizeForType(llvm::Type *Ty);

external/SPIRV-Tools

@@ -74,7 +74,9 @@ template <typename T> void DxcCallDestructor(T *obj) { obj->T::~T(); }
 #define DXC_MICROCOM_REF_FIELD(m_dwRef) \
  volatile std::atomic<llvm::sys::cas_flag> m_dwRef = {0};
 #define DXC_MICROCOM_ADDREF_IMPL(m_dwRef) \
- ULONG STDMETHODCALLTYPE AddRef() override { return (ULONG)++m_dwRef; }
+ ULONG STDMETHODCALLTYPE AddRef() noexcept override { \
+ return (ULONG)++m_dwRef; \
+ }
 #define DXC_MICROCOM_ADDREF_RELEASE_IMPL(m_dwRef) \
  DXC_MICROCOM_ADDREF_IMPL(m_dwRef) \
  ULONG STDMETHODCALLTYPE Release() override { \
@@ -107,7 +109,7 @@ inline T *CreateOnMalloc(IMalloc *pMalloc, Args &&...args) {
 
 #define DXC_MICROCOM_TM_ADDREF_RELEASE_IMPL() \
  DXC_MICROCOM_ADDREF_IMPL(m_dwRef) \
- ULONG STDMETHODCALLTYPE Release() override {  \
+ ULONG STDMETHODCALLTYPE Release() noexcept override { \
  ULONG result = (ULONG)--m_dwRef; \
  if (result == 0) { \
  CComPtr<IMalloc> pTmp(m_pMalloc); \

include/dxc/DXIL/DxilOperations.h

@@ -19,7 +19,18 @@
 #include <string>
 #include <vector>
 #ifdef _WIN32
+
+// Disable -Wignored-qualifiers for WexTestClass.h.
+// For const size_t GetSize() const; in TestData.h.
+#ifdef __clang__
+#pragma clang diagnostic push
+#pragma clang diagnostic ignored "-Wignored-qualifiers"
+#endif
 #include "WexTestClass.h"
+#ifdef __clang__
+#pragma clang diagnostic pop
+#endif
+
 #include <dxgiformat.h>
 #else
 #include "WEXAdapter.h"

include/dxc/Support/microcom.h

@@ -13,7 +13,9 @@
 #define __DXC_PIX__
 
 #include "dxc/dxcapi.h"
+#ifdef _WIN32
 #include "objidl.h"
+#endif
 
 struct __declspec(uuid("199d8c13-d312-4197-a2c1-07a532999727")) IDxcPixType
  : public IUnknown {