Support immediate version of btitwise shift on arm

Author: serge-sans-paille

include/xsimd/arch/xsimd_neon.hpp

@@ -2314,6 +2314,55 @@ namespace xsimd
  return vshlq_s64(lhs, rhs);
  }
 
+ // immediate variant
+ template <size_t shift, class A, class T, detail::enable_sized_unsigned_t<T, 1> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_lshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshlq_n_u8(x, shift);
+ }
+
+ template <size_t shift, class A, class T, detail::enable_sized_signed_t<T, 1> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_lshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshlq_n_s8(x, shift);
+ }
+
+ template <size_t shift, class A, class T, detail::enable_sized_unsigned_t<T, 2> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_lshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshlq_n_u16(x, shift);
+ }
+
+ template <size_t shift, class A, class T, detail::enable_sized_signed_t<T, 2> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_lshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshlq_n_s16(x, shift);
+ }
+
+ template <size_t shift, class A, class T, detail::enable_sized_unsigned_t<T, 4> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_lshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshlq_n_u32(x, shift);
+ }
+
+ template <size_t shift, class A, class T, detail::enable_sized_signed_t<T, 4> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_lshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshlq_n_s32(x, shift);
+ }
+
+ template <size_t shift, class A, class T, detail::enable_sized_unsigned_t<T, 8> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_lshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshlq_n_u64(x, shift);
+ }
+
+ template <size_t shift, class A, class T, detail::enable_sized_signed_t<T, 8> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_lshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshlq_n_s64(x, shift);
+ }
+
  /******************
  * bitwise_rshift *
  ******************/
@@ -2489,6 +2538,55 @@ namespace xsimd
  return vshlq_s32(lhs, vnegq_s32(rhs));
  }
 
+ // immediate variant
+ template <size_t shift, class A, class T, detail::enable_sized_unsigned_t<T, 1> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_rshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshrq_n_u8(x, shift);
+ }
+
+ template <size_t shift, class A, class T, detail::enable_sized_signed_t<T, 1> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_rshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshrq_n_s8(x, shift);
+ }
+
+ template <size_t shift, class A, class T, detail::enable_sized_unsigned_t<T, 2> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_rshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshrq_n_u16(x, shift);
+ }
+
+ template <size_t shift, class A, class T, detail::enable_sized_signed_t<T, 2> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_rshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshrq_n_s16(x, shift);
+ }
+
+ template <size_t shift, class A, class T, detail::enable_sized_unsigned_t<T, 4> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_rshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshrq_n_u32(x, shift);
+ }
+
+ template <size_t shift, class A, class T, detail::enable_sized_signed_t<T, 4> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_rshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshrq_n_s32(x, shift);
+ }
+
+ template <size_t shift, class A, class T, detail::enable_sized_unsigned_t<T, 8> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_rshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshrq_n_u64(x, shift);
+ }
+
+ template <size_t shift, class A, class T, detail::enable_sized_signed_t<T, 8> = 0>
+ XSIMD_INLINE batch<T, A> bitwise_rshift(batch<T, A> const& x, requires_arch<neon>) noexcept
+ {
+ return vshrq_n_s64(x, shift);
+ }
+
  // first
  template <class A>
  XSIMD_INLINE float first(batch<float, A> const& self, requires_arch<neon>) noexcept