@@ -76,21 +76,21 @@ struct uart_struct_t {
7676#define UART_MUTEX_UNLOCK ()
7777
7878static uart_t _uart_bus_array [] = {
79- {( volatile uart_dev_t * )( DR_REG_UART_BASE ) , 0 , NULL , NULL },
80- {( volatile uart_dev_t * )( DR_REG_UART1_BASE ) , 1 , NULL , NULL },
79+ {& UART0 , 0 , NULL , NULL },
80+ {& UART1 , 1 , NULL , NULL },
8181#if CONFIG_IDF_TARGET_ESP32
82- {( volatile uart_dev_t * )( DR_REG_UART2_BASE ) , 2 , NULL , NULL }
82+ {& UART2 , 2 , NULL , NULL }
8383#endif
8484};
8585#else
8686#define UART_MUTEX_LOCK () do {} while (xSemaphoreTake(uart->lock, portMAX_DELAY) != pdPASS)
8787#define UART_MUTEX_UNLOCK () xSemaphoreGive(uart->lock)
8888
8989static uart_t _uart_bus_array [] = {
90- {( volatile uart_dev_t * )( DR_REG_UART_BASE ) , NULL , 0 , NULL , NULL },
91- {( volatile uart_dev_t * )( DR_REG_UART1_BASE ) , NULL , 1 , NULL , NULL },
90+ {& UART0 , NULL , 0 , NULL , NULL },
91+ {& UART1 , NULL , 1 , NULL , NULL },
9292#if CONFIG_IDF_TARGET_ESP32
93- {( volatile uart_dev_t * )( DR_REG_UART2_BASE ) , NULL , 2 , NULL , NULL }
93+ {& UART2 , NULL , 2 , NULL , NULL }
9494#endif
9595};
9696#endif
@@ -116,7 +116,7 @@ static void IRAM_ATTR _uart_isr(void *arg)
116116 c = uart -> dev -> fifo .rw_byte ;
117117#else
118118 while (uart -> dev -> status .rxfifo_cnt ) {
119- c = uart -> dev -> ahb_fifo . rw_byte ;
119+ c = READ_PERI_REG ( UART_FIFO_AHB_REG ( i )) ;
120120#endif
121121 if (uart -> queue != NULL ) {
122122 xQueueSendFromISR (uart -> queue , & c , & xHigherPriorityTaskWoken );
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