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Commit 5b39f46

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Nathan Seidle
committed
Update copper to v13. Add production files.
1 parent 2a06ce3 commit 5b39f46

17 files changed

+540247
-732035
lines changed

‎Hardware/MicroMod-Teensy.brd‎

Lines changed: 10 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,24 +1,24 @@
11
<?xml version="1.0" encoding="utf-8"?>
22
<!DOCTYPE eagle SYSTEM "eagle.dtd">
3-
<eagle version="9.6.2">
3+
<eagle version="9.6.0">
44
<drawing>
55
<settings>
66
<setting alwaysvectorfont="yes"/>
77
<setting verticaltext="up"/>
88
</settings>
9-
<grid distance="1" unitdist="mm" unit="mm" style="lines" multiple="1" display="yes" altdistance="0.05" altunitdist="mm" altunit="mm"/>
9+
<grid distance="0.05" unitdist="inch" unit="inch" style="lines" multiple="1" display="yes" altdistance="0.005" altunitdist="inch" altunit="inch"/>
1010
<layers>
11-
<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
11+
<layer number="1" name="Top" color="4" fill="1" visible="no" active="yes"/>
1212
<layer number="2" name="Horz" color="1" fill="3" visible="no" active="yes"/>
1313
<layer number="15" name="Vert" color="4" fill="6" visible="no" active="yes"/>
1414
<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>
1515
<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>
1616
<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>
1717
<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>
1818
<layer number="20" name="Dimension" color="24" fill="1" visible="yes" active="yes"/>
19-
<layer number="21" name="tPlace" color="16" fill="1" visible="yes" active="yes"/>
20-
<layer number="22" name="bPlace" color="14" fill="1" visible="yes" active="yes"/>
21-
<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>
19+
<layer number="21" name="tPlace" color="16" fill="1" visible="no" active="yes"/>
20+
<layer number="22" name="bPlace" color="14" fill="1" visible="no" active="yes"/>
21+
<layer number="23" name="tOrigins" color="15" fill="1" visible="no" active="yes"/>
2222
<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/>
2323
<layer number="25" name="tNames" color="7" fill="1" visible="no" active="yes"/>
2424
<layer number="26" name="bNames" color="7" fill="1" visible="no" active="yes"/>
@@ -40,13 +40,13 @@
4040
<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="yes"/>
4141
<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="yes"/>
4242
<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/>
43-
<layer number="45" name="Holes" color="7" fill="1" visible="yes" active="yes"/>
43+
<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/>
4444
<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes"/>
4545
<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>
4646
<layer number="48" name="Document" color="7" fill="1" visible="no" active="yes"/>
47-
<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes"/>
47+
<layer number="49" name="Reference" color="7" fill="1" visible="no" active="yes"/>
4848
<layer number="50" name="dxf" color="7" fill="1" visible="no" active="yes"/>
49-
<layer number="51" name="tDocu" color="6" fill="1" visible="yes" active="yes"/>
49+
<layer number="51" name="tDocu" color="6" fill="1" visible="no" active="yes"/>
5050
<layer number="52" name="bDocu" color="7" fill="1" visible="no" active="yes"/>
5151
<layer number="91" name="Nets" color="2" fill="1" visible="no" active="no"/>
5252
<layer number="92" name="Busses" color="1" fill="1" visible="no" active="no"/>
@@ -190,7 +190,7 @@
190190
<wire x1="22" y1="4.99" x2="22" y2="18.99" width="0.1016" layer="51"/>
191191
<wire x1="22" y1="18.99" x2="0" y2="18.99" width="0.1016" layer="51"/>
192192
<wire x1="0" y1="18.99" x2="0" y2="4.99" width="0.1016" layer="51"/>
193-
<text x="19" y="21" size="0.75" layer="16" font="vector" ratio="20" rot="MR0" align="center">v12</text>
193+
<text x="19" y="21" size="0.75" layer="16" font="vector" ratio="20" rot="MR0" align="center">v13</text>
194194
<text x="30.35" y="31.67" size="1.778" layer="51" font="vector" ratio="15">0.8mm PCB
195195
45 degree chamfered edge
196196
Four layer design</text>
@@ -4902,7 +4902,6 @@ Out</text>
49024902
<wire x1="11.575" y1="9.365" x2="11.3528" y2="9.365" width="0.1016" layer="1"/>
49034903
<wire x1="11.3429" y1="9.3749" x2="11.3528" y2="9.365" width="0.1016" layer="1"/>
49044904
<via x="11.3429" y="9.3749" extent="1-16" drill="0.2"/>
4905-
<wire x1="12.8" y1="11.79" x2="13" y2="11.79" width="0.1016" layer="16"/>
49064905
<via x="13.056" y="16.213" extent="1-16" drill="0.2"/>
49074906
<via x="13.756" y="15.313" extent="1-16" drill="0.2"/>
49084907
<wire x1="6.375" y1="14.565" x2="6.05" y2="14.89" width="0.1016" layer="1"/>
@@ -4929,7 +4928,6 @@ Out</text>
49294928
<wire x1="5.4" y1="9.29" x2="5.1" y2="9.29" width="0.1016" layer="16"/>
49304929
<wire x1="5.1" y1="9.29" x2="4.7" y2="9.69" width="0.1016" layer="16"/>
49314930
<wire x1="11.575" y1="11.315" x2="11.9071" y2="10.9829" width="0.1016" layer="1"/>
4932-
<wire x1="11.9071" y1="10.9829" x2="13.86459375" y2="10.9829" width="0.1016" layer="1"/>
49334931
<wire x1="10.55546875" y1="7.7051" x2="10.71998125" y2="7.7051" width="0.1016" layer="1"/>
49344932
<wire x1="10.71998125" y1="7.7051" x2="10.77998125" y2="7.7651" width="0.1016" layer="1"/>
49354933
<wire x1="10.77998125" y1="7.7651" x2="11.2249" y2="7.7651" width="0.1016" layer="1"/>

‎Hardware/MicroMod-Teensy.sch‎

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
<?xml version="1.0" encoding="utf-8"?>
22
<!DOCTYPE eagle SYSTEM "eagle.dtd">
3-
<eagle version="9.6.2">
3+
<eagle version="9.6.0">
44
<drawing>
55
<settings>
66
<setting alwaysvectorfont="yes"/>
@@ -19458,9 +19458,9 @@ Out</text>
1945819458
<wire x1="20.32" y1="-45.72" x2="-20.32" y2="-45.72" width="0.254" layer="94"/>
1945919459
<wire x1="-20.32" y1="-45.72" x2="-20.32" y2="53.34" width="0.254" layer="94"/>
1946019460
<pin name="SPI_SCK/SDIO_CLK" x="22.86" y="50.8" length="short" rot="R180"/>
19461-
<pin name="SPI_MOSI/SDIO_CMD" x="22.86" y="48.26" length="short" rot="R180"/>
19461+
<pin name="SPI_SDO/SDIO_CMD" x="22.86" y="48.26" length="short" rot="R180"/>
1946219462
<pin name="SDIO_DATA1" x="22.86" y="43.18" length="short" rot="R180"/>
19463-
<pin name="SPI_MISO/SDIO_DATA0" x="22.86" y="45.72" length="short" rot="R180"/>
19463+
<pin name="SPI_SDI/SDIO_DATA0" x="22.86" y="45.72" length="short" rot="R180"/>
1946419464
<pin name="SDIO_DATA2" x="22.86" y="40.64" length="short" rot="R180"/>
1946519465
<pin name="SPI_!CS!/SDIO_DATA3" x="22.86" y="38.1" length="short" rot="R180"/>
1946619466
<pin name="AUD_MCLK" x="-22.86" y="0" length="short"/>
@@ -19476,8 +19476,8 @@ Out</text>
1947619476
<pin name="PWM1" x="22.86" y="12.7" length="short" rot="R180"/>
1947719477
<pin name="PWM0" x="22.86" y="15.24" length="short" rot="R180"/>
1947819478
<pin name="SPI_SCK1" x="22.86" y="33.02" length="short" rot="R180"/>
19479-
<pin name="SPI_MOSI1" x="22.86" y="30.48" length="short" rot="R180"/>
19480-
<pin name="SPI_MISO1" x="22.86" y="27.94" length="short" rot="R180"/>
19479+
<pin name="SPI_SDO1" x="22.86" y="30.48" length="short" rot="R180"/>
19480+
<pin name="SPI_SDI1" x="22.86" y="27.94" length="short" rot="R180"/>
1948119481
<pin name="BATT_VIN/3" x="-22.86" y="-30.48" length="short"/>
1948219482
<pin name="RX1" x="22.86" y="0" length="short" rot="R180"/>
1948319483
<pin name="TX1" x="22.86" y="2.54" length="short" rot="R180"/>
@@ -19652,12 +19652,12 @@ Out</text>
1965219652
<connect gate="J1" pin="SDIO_DATA2" pad="68"/>
1965319653
<connect gate="J1" pin="SPI_!CS!/SDIO_DATA3" pad="70"/>
1965419654
<connect gate="J1" pin="SPI_!CS!1" pad="55"/>
19655-
<connect gate="J1" pin="SPI_MISO/SDIO_DATA0" pad="64"/>
19656-
<connect gate="J1" pin="SPI_MISO1" pad="61"/>
19657-
<connect gate="J1" pin="SPI_MOSI/SDIO_CMD" pad="62"/>
19658-
<connect gate="J1" pin="SPI_MOSI1" pad="59"/>
1965919655
<connect gate="J1" pin="SPI_SCK/SDIO_CLK" pad="60"/>
1966019656
<connect gate="J1" pin="SPI_SCK1" pad="57"/>
19657+
<connect gate="J1" pin="SPI_SDI/SDIO_DATA0" pad="64"/>
19658+
<connect gate="J1" pin="SPI_SDI1" pad="61"/>
19659+
<connect gate="J1" pin="SPI_SDO/SDIO_CMD" pad="62"/>
19660+
<connect gate="J1" pin="SPI_SDO1" pad="59"/>
1966119661
<connect gate="J1" pin="SWDCK" pad="21"/>
1966219662
<connect gate="J1" pin="SWDIO" pad="23"/>
1966319663
<connect gate="J1" pin="TX1" pad="17"/>
@@ -19719,12 +19719,12 @@ Out</text>
1971919719
<connect gate="J1" pin="SDIO_DATA2" pad="68"/>
1972019720
<connect gate="J1" pin="SPI_!CS!/SDIO_DATA3" pad="70"/>
1972119721
<connect gate="J1" pin="SPI_!CS!1" pad="55"/>
19722-
<connect gate="J1" pin="SPI_MISO/SDIO_DATA0" pad="64"/>
19723-
<connect gate="J1" pin="SPI_MISO1" pad="61"/>
19724-
<connect gate="J1" pin="SPI_MOSI/SDIO_CMD" pad="62"/>
19725-
<connect gate="J1" pin="SPI_MOSI1" pad="59"/>
1972619722
<connect gate="J1" pin="SPI_SCK/SDIO_CLK" pad="60"/>
1972719723
<connect gate="J1" pin="SPI_SCK1" pad="57"/>
19724+
<connect gate="J1" pin="SPI_SDI/SDIO_DATA0" pad="64"/>
19725+
<connect gate="J1" pin="SPI_SDI1" pad="61"/>
19726+
<connect gate="J1" pin="SPI_SDO/SDIO_CMD" pad="62"/>
19727+
<connect gate="J1" pin="SPI_SDO1" pad="59"/>
1972819728
<connect gate="J1" pin="SWDCK" pad="21"/>
1972919729
<connect gate="J1" pin="SWDIO" pad="23"/>
1973019730
<connect gate="J1" pin="TX1" pad="17"/>
@@ -19889,7 +19889,7 @@ Out</text>
1988919889
<sheets>
1989019890
<sheet>
1989119891
<plain>
19892-
<text x="421.64" y="7.62" size="2.54" layer="94">v12</text>
19892+
<text x="421.64" y="7.62" size="2.54" layer="94">v13</text>
1989319893
<text x="348.234" y="11.176" size="2.54" layer="94">N. Seidle</text>
1989419894
<text x="274.574" y="266.446" size="2.54" layer="94" font="vector" align="center">MicroMod Connector</text>
1989519895
<text x="139.7" y="210.82" size="2.54" layer="94" font="vector" align="center">Teensy 4.x</text>
@@ -20448,7 +20448,7 @@ battery or external power</text>
2044820448
<segment>
2044920449
<wire x1="297.18" y1="231.14" x2="299.72" y2="231.14" width="0.1524" layer="91"/>
2045020450
<label x="299.72" y="231.14" size="1.27" layer="95" rot="MR180" xref="yes"/>
20451-
<pinref part="J1" gate="J1" pin="SPI_MISO1"/>
20451+
<pinref part="J1" gate="J1" pin="SPI_SDI1"/>
2045220452
</segment>
2045320453
</net>
2045420454
<net name="MOSI/11" class="0">
@@ -20460,7 +20460,7 @@ battery or external power</text>
2046020460
<segment>
2046120461
<wire x1="297.18" y1="233.68" x2="299.72" y2="233.68" width="0.1524" layer="91"/>
2046220462
<label x="299.72" y="233.68" size="1.27" layer="95" rot="MR180" xref="yes"/>
20463-
<pinref part="J1" gate="J1" pin="SPI_MOSI1"/>
20463+
<pinref part="J1" gate="J1" pin="SPI_SDO1"/>
2046420464
</segment>
2046520465
</net>
2046620466
<net name="GPIO/9" class="0">
@@ -20688,7 +20688,7 @@ battery or external power</text>
2068820688
<segment>
2068920689
<wire x1="297.18" y1="248.92" x2="299.72" y2="248.92" width="0.1524" layer="91"/>
2069020690
<label x="299.72" y="248.92" size="1.27" layer="95" xref="yes"/>
20691-
<pinref part="J1" gate="J1" pin="SPI_MISO/SDIO_DATA0"/>
20691+
<pinref part="J1" gate="J1" pin="SPI_SDI/SDIO_DATA0"/>
2069220692
</segment>
2069320693
</net>
2069420694
<net name="36/CLK" class="2">
@@ -20712,7 +20712,7 @@ battery or external power</text>
2071220712
<segment>
2071320713
<wire x1="297.18" y1="251.46" x2="299.72" y2="251.46" width="0.1524" layer="91"/>
2071420714
<label x="299.72" y="251.46" size="1.27" layer="95" xref="yes"/>
20715-
<pinref part="J1" gate="J1" pin="SPI_MOSI/SDIO_CMD"/>
20715+
<pinref part="J1" gate="J1" pin="SPI_SDO/SDIO_CMD"/>
2071620716
</segment>
2071720717
</net>
2071820718
<net name="39/DAT3" class="0">

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