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1 parent 068aea5 commit 8f49099Copy full SHA for 8f49099
src/main/scala/ip/xilinx/bscan/bscan.scala
@@ -7,7 +7,7 @@ import chisel3.experimental.{ExtModule, Analog, attach}
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object JTAGTUNNEL {
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def apply (DUT_TCK: Bool, DUT_TMS: Bool, DUT_TDI: Bool, DUT_TDO:Bool, DUT_TDO_en: Bool): Unit = {
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val inst_jtag_tunnel = Module(new JTAGTUNNEL())
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- DUT_TCK := inst_jtag_tunnel.jtag_tck
+ DUT_TCK := inst_jtag_tunnel.jtag_tck.asBool()
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DUT_TMS := inst_jtag_tunnel.jtag_tms
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DUT_TDI := inst_jtag_tunnel.jtag_tdi
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inst_jtag_tunnel.jtag_tdo := DUT_TDO
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