@@ -43375,8 +43375,9 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
4337543375 }
4337643376 case X86ISD::VSHLI: {
4337743377 SDValue Op0 = Op.getOperand(0);
43378+ SDValue Op1 = Op.getOperand(1);
4337843379
43379- unsigned ShAmt = Op.getConstantOperandVal(1 );
43380+ unsigned ShAmt = Op1->getAsZExtVal( );
4338043381 if (ShAmt >= BitWidth)
4338143382 break;
4338243383
@@ -43420,14 +43421,17 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
4342043421 return false;
4342143422 }
4342243423 case X86ISD::VSRLI: {
43423- unsigned ShAmt = Op.getConstantOperandVal(1);
43424+ SDValue Op0 = Op.getOperand(0);
43425+ SDValue Op1 = Op.getOperand(1);
43426+
43427+ unsigned ShAmt = Op1->getAsZExtVal();
4342443428 if (ShAmt >= BitWidth)
4342543429 break;
4342643430
4342743431 APInt DemandedMask = OriginalDemandedBits << ShAmt;
4342843432
43429- if (SimplifyDemandedBits(Op.getOperand(0) , DemandedMask,
43430- OriginalDemandedElts, Known, TLO, Depth + 1))
43433+ if (SimplifyDemandedBits(Op0 , DemandedMask, OriginalDemandedElts, Known ,
43434+ TLO, Depth + 1))
4343143435 return true;
4343243436
4343343437 Known.Zero.lshrInPlace(ShAmt);
@@ -43452,8 +43456,7 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
4345243456 return TLO.CombineTo(Op, Op0);
4345343457
4345443458 // fold (VSRAI (VSHLI X, C1), C1) --> X iff NumSignBits(X) > C1
43455- if (Op0.getOpcode() == X86ISD::VSHLI &&
43456- Op.getOperand(1) == Op0.getOperand(1)) {
43459+ if (Op0.getOpcode() == X86ISD::VSHLI && Op1 == Op0.getOperand(1)) {
4345743460 SDValue Op00 = Op0.getOperand(0);
4345843461 unsigned NumSignBits =
4345943462 TLO.DAG.ComputeNumSignBits(Op00, OriginalDemandedElts);
0 commit comments