Merge tag 'irq-urgent-2020-04-19' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq fixes from Thomas Gleixner: "A set of fixes/updates for the interrupt subsystem: - Remove setup_irq() and remove_irq(). All users have been converted so remove them before new users surface. - A set of bugfixes for various interrupt chip drivers - Add a few missing static attributes to address sparse warnings" * tag 'irq-urgent-2020-04-19' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/irq-bcm7038-l1: Make bcm7038_l1_of_init() static irqchip/irq-mvebu-icu: Make legacy_bindings static irqchip/meson-gpio: Fix HARDIRQ-safe -> HARDIRQ-unsafe lock order irqchip/sifive-plic: Fix maximum priority threshold value irqchip/ti-sci-inta: Fix processing of masked irqs irqchip/mbigen: Free msi_desc on device teardown irqchip/gic-v4.1: Update effective affinity of virtual SGIs irqchip/gic-v4.1: Add support for VPENDBASER's Dirty+Valid signaling genirq: Remove setup_irq() and remove_irq()

Author: torvalds

drivers/irqchip/irq-bcm7038-l1.c

@@ -416,7 +416,7 @@ static const struct irq_domain_ops bcm7038_l1_domain_ops = {
 .map= bcm7038_l1_map,
 };
 
-int __init bcm7038_l1_of_init(struct device_node *dn,
+static int __init bcm7038_l1_of_init(struct device_node *dn,
  struct device_node *parent)
 {
 struct bcm7038_l1_chip *intc;

drivers/irqchip/irq-gic-v3-its.c

@@ -14,6 +14,7 @@
 #include <linux/dma-iommu.h>
 #include <linux/efi.h>
 #include <linux/interrupt.h>
+#include <linux/iopoll.h>
 #include <linux/irqdomain.h>
 #include <linux/list.h>
 #include <linux/log2.h>
@@ -3672,6 +3673,20 @@ static int its_vpe_set_affinity(struct irq_data *d,
 return IRQ_SET_MASK_OK_DONE;
 }
 
+static void its_wait_vpt_parse_complete(void)
+{
+void __iomem *vlpi_base = gic_data_rdist_vlpi_base();
+u64 val;
+
+if (!gic_rdists->has_vpend_valid_dirty)
+return;
+
+WARN_ON_ONCE(readq_relaxed_poll_timeout(vlpi_base + GICR_VPENDBASER,
+val,
+!(val & GICR_VPENDBASER_Dirty),
+10, 500));
+}
+
 static void its_vpe_schedule(struct its_vpe *vpe)
 {
 void __iomem *vlpi_base = gic_data_rdist_vlpi_base();
@@ -3702,6 +3717,8 @@ static void its_vpe_schedule(struct its_vpe *vpe)
 val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0;
 val |= GICR_VPENDBASER_Valid;
 gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);
+
+its_wait_vpt_parse_complete();
 }
 
 static void its_vpe_deschedule(struct its_vpe *vpe)
@@ -3910,6 +3927,8 @@ static void its_vpe_4_1_schedule(struct its_vpe *vpe,
 val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id);
 
 gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);
+
+its_wait_vpt_parse_complete();
 }
 
 static void its_vpe_4_1_deschedule(struct its_vpe *vpe,
@@ -4035,6 +4054,7 @@ static int its_sgi_set_affinity(struct irq_data *d,
  * not on the host (since they can only be targetting a vPE).
  * Tell the kernel we've done whatever it asked for.
  */
+irq_data_update_effective_affinity(d, mask_val);
 return IRQ_SET_MASK_OK;
 }
 

drivers/irqchip/irq-gic-v3.c

@@ -873,6 +873,7 @@ static int __gic_update_rdist_properties(struct redist_region *region,
 gic_data.rdists.has_rvpeid &= !!(typer & GICR_TYPER_RVPEID);
 gic_data.rdists.has_direct_lpi &= (!!(typer & GICR_TYPER_DirectLPIS) |
  gic_data.rdists.has_rvpeid);
+gic_data.rdists.has_vpend_valid_dirty &= !!(typer & GICR_TYPER_DIRTY);
 
 /* Detect non-sensical configurations */
 if (WARN_ON_ONCE(gic_data.rdists.has_rvpeid && !gic_data.rdists.has_vlpis)) {
@@ -893,10 +894,11 @@ static void gic_update_rdist_properties(void)
 if (WARN_ON(gic_data.ppi_nr == UINT_MAX))
 gic_data.ppi_nr = 0;
 pr_info("%d PPIs implemented\n", gic_data.ppi_nr);
-pr_info("%sVLPI support, %sdirect LPI support, %sRVPEID support\n",
-!gic_data.rdists.has_vlpis ? "no " : "",
-!gic_data.rdists.has_direct_lpi ? "no " : "",
-!gic_data.rdists.has_rvpeid ? "no " : "");
+if (gic_data.rdists.has_vlpis)
+pr_info("GICv4 features: %s%s%s\n",
+gic_data.rdists.has_direct_lpi ? "DirectLPI " : "",
+gic_data.rdists.has_rvpeid ? "RVPEID " : "",
+gic_data.rdists.has_vpend_valid_dirty ? "Valid+Dirty " : "");
 }
 
 /* Check whether it's single security state view */
@@ -1620,6 +1622,7 @@ static int __init gic_init_bases(void __iomem *dist_base,
 gic_data.rdists.has_rvpeid = true;
 gic_data.rdists.has_vlpis = true;
 gic_data.rdists.has_direct_lpi = true;
+gic_data.rdists.has_vpend_valid_dirty = true;
 
 if (WARN_ON(!gic_data.domain) || WARN_ON(!gic_data.rdists.rdist)) {
 err = -ENOMEM;

drivers/irqchip/irq-mbigen.c

@@ -220,10 +220,16 @@ static int mbigen_irq_domain_alloc(struct irq_domain *domain,
 return 0;
 }
 
+static void mbigen_irq_domain_free(struct irq_domain *domain, unsigned int virq,
+ unsigned int nr_irqs)
+{
+platform_msi_domain_free(domain, virq, nr_irqs);
+}
+
 static const struct irq_domain_ops mbigen_domain_ops = {
 .translate= mbigen_domain_translate,
 .alloc= mbigen_irq_domain_alloc,
-.free= irq_domain_free_irqs_common,
+.free= mbigen_irq_domain_free,
 };
 
 static int mbigen_of_create_domain(struct platform_device *pdev,

drivers/irqchip/irq-meson-gpio.c

@@ -144,12 +144,17 @@ struct meson_gpio_irq_controller {
 static void meson_gpio_irq_update_bits(struct meson_gpio_irq_controller *ctl,
  unsigned int reg, u32 mask, u32 val)
 {
+unsigned long flags;
 u32 tmp;
 
+spin_lock_irqsave(&ctl->lock, flags);
+
 tmp = readl_relaxed(ctl->base + reg);
 tmp &= ~mask;
 tmp |= val;
 writel_relaxed(tmp, ctl->base + reg);
+
+spin_unlock_irqrestore(&ctl->lock, flags);
 }
 
 static void meson_gpio_irq_init_dummy(struct meson_gpio_irq_controller *ctl)
@@ -196,21 +201,24 @@ meson_gpio_irq_request_channel(struct meson_gpio_irq_controller *ctl,
  unsigned long hwirq,
  u32 **channel_hwirq)
 {
+unsigned long flags;
 unsigned int idx;
 
-spin_lock(&ctl->lock);
+spin_lock_irqsave(&ctl->lock, flags);
 
 /* Find a free channel */
 idx = find_first_zero_bit(ctl->channel_map, NUM_CHANNEL);
 if (idx >= NUM_CHANNEL) {
-spin_unlock(&ctl->lock);
+spin_unlock_irqrestore(&ctl->lock, flags);
 pr_err("No channel available\n");
 return -ENOSPC;
 }
 
 /* Mark the channel as used */
 set_bit(idx, ctl->channel_map);
 
+spin_unlock_irqrestore(&ctl->lock, flags);
+
 /*
  * Setup the mux of the channel to route the signal of the pad
  * to the appropriate input of the GIC
@@ -225,8 +233,6 @@ meson_gpio_irq_request_channel(struct meson_gpio_irq_controller *ctl,
  */
 *channel_hwirq = &(ctl->channel_irqs[idx]);
 
-spin_unlock(&ctl->lock);
-
 pr_debug("hwirq %lu assigned to channel %d - irq %u\n",
  hwirq, idx, **channel_hwirq);
 
@@ -287,13 +293,9 @@ static int meson_gpio_irq_type_setup(struct meson_gpio_irq_controller *ctl,
 val |= REG_EDGE_POL_LOW(params, idx);
 }
 
-spin_lock(&ctl->lock);
-
 meson_gpio_irq_update_bits(ctl, REG_EDGE_POL,
  REG_EDGE_POL_MASK(params, idx), val);
 
-spin_unlock(&ctl->lock);
-
 return 0;
 }
 

drivers/irqchip/irq-mvebu-icu.c

@@ -66,7 +66,7 @@ struct mvebu_icu_irq_data {
 unsigned int type;
 };
 
-DEFINE_STATIC_KEY_FALSE(legacy_bindings);
+static DEFINE_STATIC_KEY_FALSE(legacy_bindings);
 
 static void mvebu_icu_init(struct mvebu_icu *icu,
  struct mvebu_icu_msi_data *msi_data,

drivers/irqchip/irq-sifive-plic.c

@@ -56,7 +56,7 @@
 #define CONTEXT_THRESHOLD0x00
 #define CONTEXT_CLAIM0x04
 
-#definePLIC_DISABLE_THRESHOLD0xf
+#definePLIC_DISABLE_THRESHOLD0x7
 #definePLIC_ENABLE_THRESHOLD0
 
 struct plic_priv {

drivers/irqchip/irq-ti-sci-inta.c

@@ -37,6 +37,7 @@
 #define VINT_ENABLE_SET_OFFSET0x0
 #define VINT_ENABLE_CLR_OFFSET0x8
 #define VINT_STATUS_OFFSET0x18
+#define VINT_STATUS_MASKED_OFFSET0x20
 
 /**
  * struct ti_sci_inta_event_desc - Description of an event coming to
@@ -116,7 +117,7 @@ static void ti_sci_inta_irq_handler(struct irq_desc *desc)
 chained_irq_enter(irq_desc_get_chip(desc), desc);
 
 val = readq_relaxed(inta->base + vint_desc->vint_id * 0x1000 +
- VINT_STATUS_OFFSET);
+ VINT_STATUS_MASKED_OFFSET);
 
 for_each_set_bit(bit, &val, MAX_EVENTS_PER_VINT) {
 virq = irq_find_mapping(domain, vint_desc->events[bit].hwirq);

include/linux/irq.h

@@ -573,8 +573,6 @@ enum {
 #define IRQ_DEFAULT_INIT_FLAGSARCH_IRQ_INIT_FLAGS
 
 struct irqaction;
-extern int setup_irq(unsigned int irq, struct irqaction *new);
-extern void remove_irq(unsigned int irq, struct irqaction *act);
 extern int setup_percpu_irq(unsigned int irq, struct irqaction *new);
 extern void remove_percpu_irq(unsigned int irq, struct irqaction *act);
 

include/linux/irqchip/arm-gic-v3.h

@@ -243,6 +243,7 @@
 
 #define GICR_TYPER_PLPIS(1U << 0)
 #define GICR_TYPER_VLPIS(1U << 1)
+#define GICR_TYPER_DIRTY(1U << 2)
 #define GICR_TYPER_DirectLPIS(1U << 3)
 #define GICR_TYPER_LAST(1U << 4)
 #define GICR_TYPER_RVPEID(1U << 7)
@@ -686,6 +687,7 @@ struct rdists {
 boolhas_vlpis;
 boolhas_rvpeid;
 boolhas_direct_lpi;
+boolhas_vpend_valid_dirty;
 };
 
 struct irq_domain;