Update IDF to 9274814 (espressif#767)

* Update IDF to 9274814 * Fix error in i2c and Arduino

Author: me-no-dev

cores/esp32/esp32-hal-i2c.c

@@ -340,7 +340,8 @@ i2c_err_t i2cRead(i2c_t * i2c, uint16_t address, bool addr_10bit, uint8_t * data
  // Save bytes from the buffer as they arrive instead of doing them at the end of the loop since there is no
  // pause from an END operation in this approach.
  if((!isEndNear) && (nextCmdCount < 2)) {
- if (willRead = ((len>32)?32:len)) {
+ willRead = ((len>32)?32:len);
+ if (willRead > 0) {
  if (willRead > 1) {
  i2cSetCmd(i2c, cmdIdx, I2C_CMD_READ, (amountRead[ inc( &cmdIdx ) ] = willRead -1), false, false, false);
  nextCmdCount++;

tools/sdk/bin/bootloader.bin

@@ -68,7 +68,6 @@
 #define CONFIG_CONSOLE_UART_NUM 0
 #define CONFIG_ESP32_APPTRACE_LOCK_ENABLE 1
 #define CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC 1
-#define CONFIG_LWIP_THREAD_LOCAL_STORAGE_INDEX 0
 #define CONFIG_TCP_OVERSIZE_MSS 1
 #define CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS 1
 #define CONFIG_CONSOLE_UART_DEFAULT 1
@@ -85,7 +84,7 @@
 #define CONFIG_TCPIP_TASK_STACK_SIZE 2560
 #define CONFIG_FATFS_CODEPAGE_850 1
 #define CONFIG_TASK_WDT 1
-#define CONFIG_MAIN_TASK_STACK_SIZE 8192
+#define CONFIG_MAIN_TASK_STACK_SIZE 4096
 #define CONFIG_SPIFFS_PAGE_CHECK 1
 #define CONFIG_TASK_WDT_TIMEOUT_S 5
 #define CONFIG_INT_WDT_TIMEOUT_MS 300

tools/sdk/bin/bootloader_qio.bin

@@ -107,6 +107,8 @@ esp_err_t esp_console_cmd_register(const esp_console_cmd_t *cmd);
  * @param[out] cmd_ret return code from the command (set if command was run)
  * @return
  * - ESP_OK, if command was run
+ * - ESP_ERR_INVALID_ARG, if the command line is empty, or only contained
+ * whitespace
  * - ESP_ERR_NOT_FOUND, if command with given name wasn't registered
  * - ESP_ERR_INVALID_STATE, if esp_console_init wasn't called
  */

tools/sdk/include/config/sdkconfig.h

@@ -20,24 +20,38 @@ extern "C" {
 #endif
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "esp_err.h"
 #include "driver/gpio.h"
 #include "soc/adc_channel.h"
 
 typedef enum {
- ADC_ATTEN_0db = 0, /*!<The input voltage of ADC will be reduced to about 1/1 */
- ADC_ATTEN_2_5db = 1, /*!<The input voltage of ADC will be reduced to about 1/1.34 */
- ADC_ATTEN_6db = 2, /*!<The input voltage of ADC will be reduced to about 1/2 */
- ADC_ATTEN_11db = 3, /*!<The input voltage of ADC will be reduced to about 1/3.6*/
+ ADC_ATTEN_DB_0 = 0, /*!<The input voltage of ADC will be reduced to about 1/1 */
+ ADC_ATTEN_DB_2_5 = 1, /*!<The input voltage of ADC will be reduced to about 1/1.34 */
+ ADC_ATTEN_DB_6 = 2, /*!<The input voltage of ADC will be reduced to about 1/2 */
+ ADC_ATTEN_DB_11 = 3, /*!<The input voltage of ADC will be reduced to about 1/3.6*/
+ ADC_ATTEN_MAX,
 } adc_atten_t;
 
 typedef enum {
- ADC_WIDTH_9Bit = 0, /*!< ADC capture width is 9Bit*/
- ADC_WIDTH_10Bit = 1, /*!< ADC capture width is 10Bit*/
- ADC_WIDTH_11Bit = 2, /*!< ADC capture width is 11Bit*/
- ADC_WIDTH_12Bit = 3, /*!< ADC capture width is 12Bit*/
+ ADC_WIDTH_BIT_9 = 0, /*!< ADC capture width is 9Bit*/
+ ADC_WIDTH_BIT_10 = 1, /*!< ADC capture width is 10Bit*/
+ ADC_WIDTH_BIT_11 = 2, /*!< ADC capture width is 11Bit*/
+ ADC_WIDTH_BIT_12 = 3, /*!< ADC capture width is 12Bit*/
+ ADC_WIDTH_MAX,
 } adc_bits_width_t;
 
+//this definitions are only for being back-compatible
+#define ADC_ATTEN_0db ADC_ATTEN_DB_0
+#define ADC_ATTEN_2_5db ADC_ATTEN_DB_2_5
+#define ADC_ATTEN_6db ADC_ATTEN_DB_6
+#define ADC_ATTEN_11db ADC_ATTEN_DB_11
+//this definitions are only for being back-compatible
+#define ADC_WIDTH_9Bit ADC_WIDTH_BIT_9
+#define ADC_WIDTH_10Bit ADC_WIDTH_BIT_10
+#define ADC_WIDTH_11Bit ADC_WIDTH_BIT_11
+#define ADC_WIDTH_12Bit ADC_WIDTH_BIT_12
+
 typedef enum {
  ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO36 */
  ADC1_CHANNEL_1, /*!< ADC1 channel 1 is GPIO37 */
@@ -64,11 +78,43 @@ typedef enum {
  ADC2_CHANNEL_MAX,
 } adc2_channel_t;
 
+typedef enum {
+ ADC_CHANNEL_0 = 0, /*!< ADC channel */
+ ADC_CHANNEL_1, /*!< ADC channel */
+ ADC_CHANNEL_2, /*!< ADC channel */
+ ADC_CHANNEL_3, /*!< ADC channel */
+ ADC_CHANNEL_4, /*!< ADC channel */
+ ADC_CHANNEL_5, /*!< ADC channel */
+ ADC_CHANNEL_6, /*!< ADC channel */
+ ADC_CHANNEL_7, /*!< ADC channel */
+ ADC_CHANNEL_8, /*!< ADC channel */
+ ADC_CHANNEL_9, /*!< ADC channel */
+ ADC_CHANNEL_MAX,
+} adc_channel_t;
+
+typedef enum {
+ ADC_UNIT_1 = 1, /*!< SAR ADC 1*/
+ ADC_UNIT_2 = 2, /*!< SAR ADC 2, not supported yet*/
+ ADC_UNIT_BOTH = 3, /*!< SAR ADC 1 and 2, not supported yet */
+ ADC_UNIT_ALTER = 7, /*!< SAR ADC 1 and 2 alternative mode, not supported yet */
+ ADC_UNIT_MAX,
+} adc_unit_t;
+
+typedef enum {
+ ADC_ENCODE_12BIT, /*!< ADC to I2S data format, [15:12]-channel [11:0]-12 bits ADC data */
+ ADC_ENCODE_11BIT, /*!< ADC to I2S data format, [15]-1 [14:11]-channel [10:0]-11 bits ADC data */
+ ADC_ENCODE_MAX,
+} adc_i2s_encode_t;
+
+typedef enum {
+ ADC_I2S_DATA_SRC_IO_SIG = 0, /*!< I2S data from GPIO matrix signal */
+ ADC_I2S_DATA_SRC_ADC = 1, /*!< I2S data from ADC */
+ ADC_I2S_DATA_SRC_MAX,
+} adc_i2s_source_t;
+
 /**
- * @brief Configure ADC1 capture width.
- *
+ * @brief Configure ADC1 capture width, meanwhile enable output invert for ADC1.
  * The configuration is for all channels of ADC1
- *
  * @param width_bit Bit capture width for ADC1
  *
  * @return
@@ -77,6 +123,16 @@ typedef enum {
  */
 esp_err_t adc1_config_width(adc_bits_width_t width_bit);
 
+/**
+ * @brief Configure ADC capture width.
+ * @param adc_unit ADC unit index
+ * @param width_bit Bit capture width for ADC unit.
+ * @return
+ * - ESP_OK success
+ * - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit);
+
 /**
  * @brief Configure the ADC1 channel, including setting attenuation.
  *
@@ -89,10 +145,10 @@ esp_err_t adc1_config_width(adc_bits_width_t width_bit);
  *
  * When VDD_A is 3.3V:
  *
- * - 0dB attenuaton (ADC_ATTEN_0db) gives full-scale voltage 1.1V
- * - 2.5dB attenuation (ADC_ATTEN_2_5db) gives full-scale voltage 1.5V
- * - 6dB attenuation (ADC_ATTEN_6db) gives full-scale voltage 2.2V
- * - 11dB attenuation (ADC_ATTEN_11db) gives full-scale voltage 3.9V (see note below)
+ * - 0dB attenuaton (ADC_ATTEN_DB_0) gives full-scale voltage 1.1V
+ * - 2.5dB attenuation (ADC_ATTEN_DB_2_5) gives full-scale voltage 1.5V
+ * - 6dB attenuation (ADC_ATTEN_DB_6) gives full-scale voltage 2.2V
+ * - 11dB attenuation (ADC_ATTEN_DB_11) gives full-scale voltage 3.9V (see note below)
  *
  * @note The full-scale voltage is the voltage corresponding to a maximum reading (depending on ADC1 configured
  * bit width, this value is: 4095 for 12-bits, 2047 for 11-bits, 1023 for 10-bits, 511 for 9 bits.)
@@ -134,6 +190,62 @@ int adc1_get_raw(adc1_channel_t channel);
 int adc1_get_voltage(adc1_channel_t channel) __attribute__((deprecated));
 /** @endcond */
 
+/**
+ * @brief Power on SAR ADC
+ */
+void adc_power_on();
+
+/**
+ * @brief Power off SAR ADC
+ */
+void adc_power_off();
+
+/**
+ * @brief Initialize ADC pad
+ * @param adc_unit ADC unit index
+ * @param channel ADC channel index
+ * @return
+ * - ESP_OK success
+ * - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_gpio_init(adc_unit_t adc_unit, adc_channel_t channel);
+
+/**
+ * @brief Set ADC data invert
+ * @param adc_unit ADC unit index
+ * @param inv_en whether enable data invert
+ * @return
+ * - ESP_OK success
+ * - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_set_data_inv(adc_unit_t adc_unit, bool inv_en);
+
+/**
+ * @brief Set ADC source clock
+ * @param clk_div ADC clock divider, ADC clock is divided from APB clock
+ * @return
+ * - ESP_OK success
+ */
+esp_err_t adc_set_clk_div(uint8_t clk_div);
+
+/**
+ * @brief Set I2S data source
+ * @param src I2S DMA data source, I2S DMA can get data from digital signals or from ADC.
+ * @return
+ * - ESP_OK success
+ */
+esp_err_t adc_set_i2s_data_source(adc_i2s_source_t src);
+
+/**
+ * @brief Initialize I2S ADC mode
+ * @param adc_unit ADC unit index
+ * @param channel ADC channel index
+ * @return
+ * - ESP_OK success
+ * - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel);
+
 /**
  * @brief Configure ADC1 to be usable by the ULP
  *

tools/sdk/include/console/esp_console.h

@@ -200,7 +200,7 @@ esp_err_t i2c_isr_free(intr_handle_t handle);
  * - ESP_OK Success
  * - ESP_ERR_INVALID_ARG Parameter error
  */
-esp_err_t i2c_set_pin(i2c_port_t i2c_num, gpio_num_t sda_io_num, gpio_num_t scl_io_num,
+esp_err_t i2c_set_pin(i2c_port_t i2c_num, int sda_io_num, int scl_io_num,
  gpio_pullup_t sda_pullup_en, gpio_pullup_t scl_pullup_en, i2c_mode_t mode);
 
 /**
@@ -341,7 +341,7 @@ esp_err_t i2c_master_stop(i2c_cmd_handle_t cmd_handle);
  * - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
  * - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
  */
-esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle, portBASE_TYPE ticks_to_wait);
+esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle, TickType_t ticks_to_wait);
 
 /**
  * @brief I2C slave write data to internal ringbuffer, when tx fifo empty, isr will fill the hardware
@@ -358,7 +358,7 @@ esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle,
  * - ESP_FAIL(-1) Parameter error
  * - Others(>=0) The number of data bytes that pushed to the I2C slave buffer.
  */
-int i2c_slave_write_buffer(i2c_port_t i2c_num, uint8_t* data, int size, portBASE_TYPE ticks_to_wait);
+int i2c_slave_write_buffer(i2c_port_t i2c_num, uint8_t* data, int size, TickType_t ticks_to_wait);
 
 /**
  * @brief I2C slave read data from internal buffer. When I2C slave receive data, isr will copy received data
@@ -375,7 +375,7 @@ int i2c_slave_write_buffer(i2c_port_t i2c_num, uint8_t* data, int size, portBASE
  * - ESP_FAIL(-1) Parameter error
  * - Others(>=0) The number of data bytes that read from I2C slave buffer.
  */
-int i2c_slave_read_buffer(i2c_port_t i2c_num, uint8_t* data, size_t max_size, portBASE_TYPE ticks_to_wait);
+int i2c_slave_read_buffer(i2c_port_t i2c_num, uint8_t* data, size_t max_size, TickType_t ticks_to_wait);
 
 /**
  * @brief set I2C master clock period
@@ -481,6 +481,25 @@ esp_err_t i2c_set_data_timing(i2c_port_t i2c_num, int sample_time, int hold_time
  */
 esp_err_t i2c_get_data_timing(i2c_port_t i2c_num, int* sample_time, int* hold_time);
 
+/**
+ * @brief set I2C timeout value
+ * @param i2c_num I2C port number
+ * @param timeout timeout value for I2C bus (unit: APB 80Mhz clock cycle)
+ * @return
+ * - ESP_OK Success
+ * - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_set_timeout(i2c_port_t i2c_num, int timeout);
+
+/**
+ * @brief get I2C timeout value
+ * @param i2c_num I2C port number
+ * @param timeout pointer to get timeout value
+ * @return
+ * - ESP_OK Success
+ * - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t i2c_get_timeout(i2c_port_t i2c_num, int* timeout);
 /**
  * @brief set I2C data transfer mode
  *

tools/sdk/include/driver/driver/adc.h

@@ -26,6 +26,7 @@
 #include "esp_attr.h"
 #include "esp_intr_alloc.h"
 #include "driver/periph_ctrl.h"
+#include "driver/adc.h"
 #include "freertos/semphr.h"
 
 #ifdef __cplusplus
@@ -118,7 +119,7 @@ typedef enum {
  I2S_MODE_TX = 4,
  I2S_MODE_RX = 8,
  I2S_MODE_DAC_BUILT_IN = 16, /*!< Output I2S data to built-in DAC, no matter the data format is 16bit or 32 bit, the DAC module will only take the 8bits from MSB*/
- //I2S_MODE_ADC_BUILT_IN = 32, /*!< Currently not supported yet, will be added for the next version*/
+ I2S_MODE_ADC_BUILT_IN = 32,  /*!< Input I2S data from built-in ADC, each data can be 12-bit width at most*/
  I2S_MODE_PDM = 64,
 } i2s_mode_t;
 
@@ -405,6 +406,17 @@ esp_err_t i2s_zero_dma_buffer(i2s_port_t i2s_num);
  */
 esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, i2s_bits_per_sample_t bits, i2s_channel_t ch);
 
+/**
+ * @brief Set built-in ADC mode for I2S DMA, this function will initialize ADC pad,
+ * and set ADC parameters.
+ * @param adc_unit SAR ADC unit index
+ * @param adc_channel ADC channel index
+ * @return
+ * - ESP_OK Success
+ * - ESP_FAIL Parameter error
+ */
+esp_err_t i2s_set_adc_mode(adc_unit_t adc_unit, adc1_channel_t adc_channel);
+
 #ifdef __cplusplus
 }
 #endif

tools/sdk/include/driver/driver/i2c.h

@@ -102,6 +102,7 @@ typedef struct {
 #define SCF_RSP_R6 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
 #define SCF_RSP_R7 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
  esp_err_t error; /*!< error returned from transfer */
+ int timeout_ms; /*!< response timeout, in milliseconds */
 } sdmmc_command_t;
 
 /**
@@ -127,6 +128,7 @@ typedef struct {
  esp_err_t (*set_card_clk)(int slot, uint32_t freq_khz); /*!< host function to set card clock frequency */
  esp_err_t (*do_transaction)(int slot, sdmmc_command_t* cmdinfo); /*!< host function to do a transaction */
  esp_err_t (*deinit)(void); /*!< host function to deinitialize the driver */
+ int command_timeout_ms; /*!< timeout, in milliseconds, of a single command. Set to 0 to use the default value. */
 } sdmmc_host_t;
 
 /**

tools/sdk/include/driver/driver/i2s.h

@@ -53,6 +53,7 @@ typedef struct {
  */
 struct spi_slave_transaction_t {
  size_t length; ///< Total data length, in bits
+ size_t trans_len; ///< Transaction data length, in bits
  const void *tx_buffer; ///< Pointer to transmit buffer, or NULL for no MOSI phase
  void *rx_buffer; ///< Pointer to receive buffer, or NULL for no MISO phase
  void *user; ///< User-defined variable. Can be used to store eg transaction ID.