Added module instantiation #41
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mshr-h added a commit that referenced this pull request Nov 16, 2018
* First step in integrating System Verilog (#26) Migrated syntax highlighting and snippets * Ctags Integration (#33) * First step in integrating System Verilog Migrated syntax highlighting and snippets * Ported "Hover variable declaration" It now supports both verilog and systemverilog * tags parser working. Issues with range * Adding verilator support (#32) * Adding verilator support * updated the readme for verilator updated the package.json for verilator removed notices about errors in submodules. * Update README.md * Crude, yet working ctags symbol provider * separated ctags logic from others * basic implementation of Hover provider * Basic Definition Provider done * Code clean up and comments * basic completion item provider (#37) * Added module instantiation (#41) * Fixing issue #42 (#43) supporting sv in linters
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Migrated "Module Instantiation" from mshr/vscode-systemverilog-support
Uses Ctags to find the modules and their ports from the file
Triggered using a command "Instantiate module"
referring #25