Additions to the schematic review checklist, GPIO section. #594
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| @mattheweshleman thank you for sharing these extra items! I'd like to check with the original author @schultetwin first before we add these. Mark, let us know what you think of adding these checks to the GPIO schematic review section |
schultetwin reviewed Aug 8, 2025
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Thank you for the additions! I left some comments inline. Happy to talk through them.
Comment on lines 219 to 224
| - [x] If the target microcontroller constraints allow for it, are some GPIO pins | ||
| assigned for arbitrary firmware development, measurements and debug | ||
| purposes? [6](https://covemountainsoftware.com/2016/12/27/brother-can-you-spare-a-gpio/) | ||
| - [x] Subject to board layout constraints, are the debug GPIOs routed to | ||
| test points that may be connected to an o-scope or other common | ||
| tools with minimal risk to the PCB or personnel? |
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This is a great addition. What do you think about moving this to the Debug/Test infrastructure section? (And maybe leave a one-line note here?)
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| @mattheweshleman Checking in to see if you had the chance to review @schultetwin's recommendations. I'd love to get these additions merged! |
Co-authored-by: Mark Schulte <schultetwin@gmail.com>
gminn approved these changes Sep 5, 2025
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Per note in LinkedIn from François Baldassari, pull request for additions to the schematic review checklist, GPIO section.