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Pull requests: llvm/llvm-project
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[RISCV] Reduce minimum VL needed for vslidedown.vx in RISCVVLOptimizer backend:RISC-V
#168392 opened Nov 17, 2025 by lukel97 Loading…
[VectorUtils] Improve mask*All(Ones|Zero)OrUndef (NFC) llvm:analysis Includes value tracking, cost tables and constant folding
#168388 opened Nov 17, 2025 by artagnon Loading…
[LLVM][CodeGen][SVE] Only use unpredicated bfloat instructions when all lanes are in use. backend:AArch64
#168387 opened Nov 17, 2025 by paulwalker-arm Loading…
[libc] Fix wrapper headers if std=c99 is set backend:X86 clang:headers Headers provided by Clang, e.g. for intrinsics clang Clang issues not falling into any other category
#168386 opened Nov 17, 2025 by DominikAdamski Loading…
[VPlan] Implement printing VPIRMetadata. llvm:transforms vectorizers
#168385 opened Nov 17, 2025 by fhahn Loading…
[PowerPC ]convert
(setcc (and X, 1), 0, eq) to XORI (and X, 1), 1 backend:PowerPC #168384 opened Nov 17, 2025 by diggerlin Loading…
[clang][DebugInfo] Mark _BitInt's as reconstitutable when emitting -gsimple-template-names clang:codegen IR generation bugs: mangling, exceptions, etc. clang Clang issues not falling into any other category debuginfo
#168383 opened Nov 17, 2025 by Michael137 Loading…
[llvm][DebugInfo] Add support for _BitInt in DWARFTypePrinter debuginfo
#168382 opened Nov 17, 2025 by Michael137 Loading…
[XRay] Run tests inside bootstrapping build compiler-rt xray
#168378 opened Nov 17, 2025 by boomanaiden154 Loading…
[MLIR][NVVM] Move the docs to markdown file mlir:llvm mlir
#168375 opened Nov 17, 2025 by grypp Loading…
[AMDGPU] Enable serializing of allocated preload kernarg SGPRs info backend:AMDGPU
#168374 opened Nov 17, 2025 by tyb0807 Loading…
[VPlan] Hoist predicated loads with replicate recipes backend:RISC-V llvm:analysis Includes value tracking, cost tables and constant folding llvm:transforms vectorizers
#168373 opened Nov 17, 2025 by fhahn Loading…
[mlir][tosa] Introduce arith.constant -> tosa.const normalization pass mlir:tosa mlir
#168370 opened Nov 17, 2025 by Lallapallooza Loading…
[NVPTX] TableGen-erate SDNode descriptions backend:NVPTX
#168367 opened Nov 17, 2025 by s-barannikov Loading…
[LLD] Add flag to force PLT entries to have a BTI lld:ELF lld
#168365 opened Nov 17, 2025 by bgergely0 Loading…
Add (ignored) /link flag to lld-link for compatibility with MSVC link.exe lld:COFF lld platform:windows
#168364 opened Nov 17, 2025 by frankier Loading…
[Linalg] Add *Conv2D* matchers mlir:linalg mlir
#168362 opened Nov 17, 2025 by Abhishek-Varma Loading…
[mlir][emitc] Refactor getEmittedExpression (NFC) mlir:emitc mlir
#168361 opened Nov 17, 2025 by aniragil Loading…
[clang][NVPTX] Add intrinsics and builtins for mixed-precision FP arithmetic backend:NVPTX clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category llvm:ir
#168359 opened Nov 17, 2025 by Wolfram70 Loading…
[AMDGPU] Allow amdgpu-waves-per-eu to lower target occupancy range backend:AMDGPU
#168358 opened Nov 17, 2025 by lucas-rami Loading…
[TableGen] Strip directories from filename prefixes. tablegen
#168355 opened Nov 17, 2025 by kosarev Loading…
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ProTip! Updated in the last three days: updated:>2025-11-14.