[WIP][RFC][X86] Remove MOVSS/D -> BLENDPS/D conversions from DAG/ISEL #144338
+335 −238
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RKSimon changed the title 
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RKSimon force-pushed the x86-isel-blend-mov branch 2 times, most recently from 86e3107 to 91f6d8b Compare This patch attempts to remove most of the MOVSS/D vs BLENDPS/D OptForSize/OptForSpeed instruction selection as possible and lets later domain switching and X86FixupInstTuning passes handle it. (V)MOVSS/D instructions are created in all cases, which also avoids AVX512 getting stuck with VBLENDPS/D VEC inctructions restricting register usage. getExecutionDomainCustom can now convert MOVSS/D to BLENDW/PS to support domain switches and X86FixupInstTuning can convert VMOVSS/D back to VBLENDPS/D if the scheduler model prefers it (and not building for OptSize). Fixes llvm#142972
RKSimon force-pushed the x86-isel-blend-mov branch from 91f6d8b to 3fc9f7b Compare Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
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This patch attempts to remove as much of the MOVSS/D vs BLENDPS/D OptForSize/OptForSpeed instruction selection as possible and lets later domain switching and X86FixupInstTuning passes handle it.
(V)MOVSS/D instructions are created in all cases, which also avoids AVX512 getting prematurely stuck with VBLENDPS/D VEX instructions restricting register usage.
getExecutionDomainCustom can now convert MOVSS/D to BLENDW/PS to support domain switches and X86FixupInstTuning can convert VMOVSS/D back to VBLENDPS/D if the scheduler model prefers it (and not building for OptSize).
Fixes #142972