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[LV] Remove common extends and selects in CSE

backend:PowerPC

backend:RISC-V

llvm:ir

llvm:transforms

vectorizers

Status: Closed (abandoned).

llvm/llvm-projectnumber 147731

#147731 In llvm/llvm-project;

· by SamTebbs33 was closed on Aug 19, 2025

[LV] Bundle partial reductions inside VPExpressionRecipe

backend:AArch64

backend:RISC-V

llvm:analysisIncludes value tracking, cost tables and constant foldingIncludes value tracking, cost tables and constant folding

llvm:transforms

vectorizers

Status: Merged (completed).

llvm/llvm-projectnumber 147302

#147302 In llvm/llvm-project;

· by SamTebbs33 was closed on Oct 23, 2025

[LoopVectorizer] Prune VFs based on plan register pressure

backend:PowerPC

backend:RISC-V

llvm:transforms

vectorizers

Status: Merged (completed).

llvm/llvm-projectnumber 132190

#132190 In llvm/llvm-project;

· by SamTebbs33 was closed on May 19, 2025