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Commit c571617

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Eli Friedman
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[ARM] Clarify legal addressing modes for ARM and Thumb2. NFC
The existing code is very clever, but not clear, which seems like the wrong tradeoff here. Differential Revision: https://reviews.llvm.org/D36559 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310653 91177308-0d34-0410-b5e6-96231b3b80d8
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lib/Target/ARM/ARMISelLowering.cpp

Lines changed: 11 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -12357,8 +12357,13 @@ bool ARMTargetLowering::isLegalT2ScaledAddressingMode(const AddrMode &AM,
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Scale = Scale & ~1;
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return Scale == 2 || Scale == 4 || Scale == 8;
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case MVT::i64:
12360+
// FIXME: What are we trying to model here? ldrd doesn't have an r + r
12361+
// version in Thumb mode.
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// r + r
12361-
if (((unsigned)AM.HasBaseReg + Scale) <= 2)
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if (Scale == 1)
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return true;
12365+
// r * 2 (this can be lowered to r + r).
12366+
if (!AM.HasBaseReg && Scale == 2)
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return true;
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return false;
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case MVT::isVoid:
@@ -12416,8 +12421,11 @@ bool ARMTargetLowering::isLegalAddressingMode(const DataLayout &DL,
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return isPowerOf2_32(Scale & ~1);
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case MVT::i16:
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case MVT::i64:
12419-
// r + r
12420-
if (((unsigned)AM.HasBaseReg + Scale) <= 2)
12424+
// r +/- r
12425+
if (Scale == 1 || (AM.HasBaseReg && Scale == -1))
12426+
return true;
12427+
// r * 2 (this can be lowered to r + r).
12428+
if (!AM.HasBaseReg && Scale == 2)
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return true;
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return false;
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