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1 parent 8daf23d commit bc93d51Copy full SHA for bc93d51
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
@@ -222,6 +222,7 @@ class RISCVTTIImpl : public BasicTTIImplBase<RISCVTTIImpl> {
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}
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llvm_unreachable("unknown register class");
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+
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unsigned getRegisterClassForType(bool Vector, Type *Ty = nullptr) const {
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if (Vector)
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return RISCVRegisterClass::VRRC;
@@ -236,7 +237,8 @@ class RISCVTTIImpl : public BasicTTIImplBase<RISCVTTIImpl> {
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return RISCVRegisterClass::GPRRC;
- };
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+ }
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const char *getRegisterClassName(unsigned ClassID) const {
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switch (ClassID) {
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case RISCVRegisterClass::GPRRC:
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