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Move isTypeLegal condition up
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llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5787,6 +5787,9 @@ SDValue DAGCombiner::hoistLogicOpWithSameOpcodeHands(SDNode *N) {
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// logic_op (truncate x), (truncate y) --> truncate (logic_op x, y)
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if (HandOpcode == ISD::TRUNCATE) {
5790+
// Don't create a logic op on an illegal type.
5791+
if (!TLI.isTypeLegal(XVT))
5792+
return SDValue();
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// If both operands have other uses, this transform would create extra
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// instructions without eliminating anything.
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if (!N0.hasOneUse() && !N1.hasOneUse())
@@ -5805,9 +5808,6 @@ SDValue DAGCombiner::hoistLogicOpWithSameOpcodeHands(SDNode *N) {
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// transformation.
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if (TLI.isNarrowingProfitable(XVT, VT))
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return SDValue();
5808-
// Don't create a logic op on an illegal type.
5809-
if (!TLI.isTypeLegal(XVT))
5810-
return SDValue();
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SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y);
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return DAG.getNode(HandOpcode, DL, VT, Logic);
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}

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