Skip to content

Commit 670736a

Browse files
author
Ahsan Saghir
committed
[PowerPC] Prevent argument promotion of types with size greater than 128 bits
This patch prevents argument promotion of types having type size greater than 128 bits. Fixes Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=49952 Reviewed By: #powerpc, nemanjai Differential Revision: https://reviews.llvm.org/D101188
1 parent 33ff3c2 commit 670736a

File tree

3 files changed

+132
-1
lines changed

3 files changed

+132
-1
lines changed

‎llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp‎

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1221,6 +1221,27 @@ PPCTTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
12211221
return BaseT::getIntrinsicInstrCost(ICA, CostKind);
12221222
}
12231223

1224+
bool PPCTTIImpl::areFunctionArgsABICompatible(
1225+
const Function *Caller, const Function *Callee,
1226+
SmallPtrSetImpl<Argument *> &Args) const {
1227+
1228+
// We need to ensure that argument promotion does not
1229+
// attempt to promote pointers to MMA types (__vector_pair
1230+
// and __vector_quad) since these types explicitly cannot be
1231+
// passed as arguments. Both of these types are larger than
1232+
// the 128-bit Altivec vectors and have a scalar size of 1 bit.
1233+
if (!BaseT::areFunctionArgsABICompatible(Caller, Callee, Args))
1234+
return false;
1235+
1236+
return llvm::none_of(Args, [](Argument *A) {
1237+
auto *EltTy = cast<PointerType>(A->getType())->getElementType();
1238+
if (EltTy->isSized())
1239+
return (EltTy->isIntOrIntVectorTy(1) &&
1240+
EltTy->getPrimitiveSizeInBits() > 128);
1241+
return false;
1242+
});
1243+
}
1244+
12241245
bool PPCTTIImpl::canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE,
12251246
LoopInfo *LI, DominatorTree *DT,
12261247
AssumptionCache *AC, TargetLibraryInfo *LibInfo) {

‎llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -135,7 +135,9 @@ class PPCTTIImpl : public BasicTTIImplBase<PPCTTIImpl> {
135135
bool UseMaskForCond = false, bool UseMaskForGaps = false);
136136
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
137137
TTI::TargetCostKind CostKind);
138-
138+
bool areFunctionArgsABICompatible(const Function *Caller,
139+
const Function *Callee,
140+
SmallPtrSetImpl<Argument *> &Args) const;
139141
/// @}
140142
};
141143

‎llvm/test/CodeGen/PowerPC/arg_promotion.ll‎

Lines changed: 108 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,108 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2+
; RUN: opt -S -argpromotion -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
3+
; RUN: opt -S -passes=argpromotion -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
4+
5+
; Test to check that we do not promote arguments when the
6+
; type size is greater than 128 bits.
7+
8+
define internal fastcc void @print_acc(<512 x i1>* nocapture readonly %a) nounwind {
9+
; CHECK-LABEL: @print_acc(
10+
; CHECK-NEXT: entry:
11+
; CHECK-NEXT: [[TMP0:%.*]] = load <512 x i1>, <512 x i1>* [[A:%.*]], align 64
12+
; CHECK-NEXT: [[TMP1:%.*]] = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1> [[TMP0]])
13+
; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[TMP1]], 0
14+
; CHECK-NEXT: ret void
15+
;
16+
entry:
17+
%0 = load <512 x i1>, <512 x i1>* %a, align 64
18+
%1 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1> %0)
19+
%2 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %1, 0
20+
ret void
21+
}
22+
23+
declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1>) nounwind
24+
25+
define dso_local void @test(<512 x i1>* nocapture %a, <16 x i8> %ac) {
26+
; CHECK-LABEL: @test(
27+
; CHECK-NEXT: entry:
28+
; CHECK-NEXT: [[TMP0:%.*]] = tail call <512 x i1> @llvm.ppc.mma.xvf32ger(<16 x i8> [[AC:%.*]], <16 x i8> [[AC]])
29+
; CHECK-NEXT: store <512 x i1> [[TMP0]], <512 x i1>* [[A:%.*]], align 64
30+
; CHECK-NEXT: tail call fastcc void @print_acc(<512 x i1>* nonnull [[A]])
31+
; CHECK-NEXT: ret void
32+
;
33+
entry:
34+
%0 = tail call <512 x i1> @llvm.ppc.mma.xvf32ger(<16 x i8> %ac, <16 x i8> %ac)
35+
store <512 x i1> %0, <512 x i1>* %a, align 64
36+
tail call fastcc void @print_acc(<512 x i1>* nonnull %a)
37+
ret void
38+
}
39+
40+
declare <512 x i1> @llvm.ppc.mma.xvf32ger(<16 x i8>, <16 x i8>) nounwind
41+
42+
@.str = private unnamed_addr constant [11 x i8] c"Vector: { \00", align 1
43+
@.str.1 = private unnamed_addr constant [5 x i8] c"%d, \00", align 1
44+
@.str.2 = private unnamed_addr constant [6 x i8] c"%d }\0A\00", align 1
45+
46+
define internal fastcc void @printWideVec(<16 x i32> %ptr.val) nounwind {
47+
; CHECK-LABEL: @printWideVec(
48+
; CHECK-NEXT: entry:
49+
; CHECK-NEXT: [[CALL:%.*]] = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
50+
; CHECK-NEXT: [[VECEXT:%.*]] = extractelement <16 x i32> [[PTR_VAL:%.*]], i32 0
51+
; CHECK-NEXT: [[CALL1:%.*]] = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 signext [[VECEXT]])
52+
; CHECK-NEXT: [[VECEXT_1:%.*]] = extractelement <16 x i32> [[PTR_VAL]], i32 1
53+
; CHECK-NEXT: [[CALL1_1:%.*]] = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 signext [[VECEXT_1]])
54+
; CHECK-NEXT: [[VECEXT_2:%.*]] = extractelement <16 x i32> [[PTR_VAL]], i32 2
55+
; CHECK-NEXT: [[CALL1_2:%.*]] = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 signext [[VECEXT_2]])
56+
; CHECK-NEXT: [[VECEXT_3:%.*]] = extractelement <16 x i32> [[PTR_VAL]], i32 3
57+
; CHECK-NEXT: [[CALL1_3:%.*]] = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 signext [[VECEXT_3]])
58+
; CHECK-NEXT: [[VECEXT_4:%.*]] = extractelement <16 x i32> [[PTR_VAL]], i32 4
59+
; CHECK-NEXT: [[CALL1_4:%.*]] = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 signext [[VECEXT_4]])
60+
; CHECK-NEXT: [[VECEXT_5:%.*]] = extractelement <16 x i32> [[PTR_VAL]], i32 5
61+
; CHECK-NEXT: [[CALL1_5:%.*]] = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 signext [[VECEXT_5]])
62+
; CHECK-NEXT: [[VECEXT_6:%.*]] = extractelement <16 x i32> [[PTR_VAL]], i32 6
63+
; CHECK-NEXT: [[CALL1_6:%.*]] = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 signext [[VECEXT_6]])
64+
; CHECK-NEXT: [[VECEXT2:%.*]] = extractelement <16 x i32> [[PTR_VAL]], i32 7
65+
; CHECK-NEXT: [[CALL3:%.*]] = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i32 signext [[VECEXT2]])
66+
; CHECK-NEXT: ret void
67+
;
68+
entry:
69+
%call = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
70+
%vecext = extractelement <16 x i32> %ptr.val, i32 0
71+
%call1 = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 signext %vecext)
72+
%vecext.1 = extractelement <16 x i32> %ptr.val, i32 1
73+
%call1.1 = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 signext %vecext.1)
74+
%vecext.2 = extractelement <16 x i32> %ptr.val, i32 2
75+
%call1.2 = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 signext %vecext.2)
76+
%vecext.3 = extractelement <16 x i32> %ptr.val, i32 3
77+
%call1.3 = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 signext %vecext.3)
78+
%vecext.4 = extractelement <16 x i32> %ptr.val, i32 4
79+
%call1.4 = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 signext %vecext.4)
80+
%vecext.5 = extractelement <16 x i32> %ptr.val, i32 5
81+
%call1.5 = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 signext %vecext.5)
82+
%vecext.6 = extractelement <16 x i32> %ptr.val, i32 6
83+
%call1.6 = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 signext %vecext.6)
84+
%vecext2 = extractelement <16 x i32> %ptr.val, i32 7
85+
%call3 = tail call signext i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i32 signext %vecext2)
86+
ret void
87+
}
88+
89+
declare noundef signext i32 @printf(i8* nocapture noundef readonly, ...) nounwind
90+
91+
define dso_local void @test1(<4 x i32> %a, <4 x i32> %b) nounwind {
92+
; CHECK-LABEL: @test1(
93+
; CHECK-NEXT: entry:
94+
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
95+
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[B:%.*]], <4 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
96+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
97+
; CHECK-NEXT: [[VECINIT22:%.*]] = shufflevector <16 x i32> [[TMP2]], <16 x i32> [[TMP1]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
98+
; CHECK-NEXT: tail call fastcc void @printWideVec(<16 x i32> [[VECINIT22]])
99+
; CHECK-NEXT: ret void
100+
;
101+
entry:
102+
%0 = shufflevector <4 x i32> %a, <4 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
103+
%1 = shufflevector <4 x i32> %b, <4 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
104+
%2 = shufflevector <16 x i32> %0, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
105+
%vecinit22 = shufflevector <16 x i32> %2, <16 x i32> %1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
106+
tail call fastcc void @printWideVec(<16 x i32> %vecinit22)
107+
ret void
108+
}

0 commit comments

Comments
 (0)