Fix AMD infinite loop

Author: justinfargnoli

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

@@ -6036,6 +6036,10 @@ SDValue DAGCombiner::hoistLogicOpWithSameOpcodeHands(SDNode *N) {
  HandOpcode == ISD::ANY_EXTEND_VECTOR_INREG) &&
  LegalTypes && !TLI.isTypeDesirableForOp(LogicOpcode, XVT))
  return SDValue();
+ // Prevent an infinite loop if the target prefers the inverse
+ // transformation.
+ if (TLI.isNarrowingProfitable(N, XVT, VT))
+ return SDValue();
  // logic_op (hand_op X), (hand_op Y) --> hand_op (logic_op X, Y)
  SDNodeFlags LogicFlags;
  LogicFlags.setDisjoint(N->getFlags().hasDisjoint() &&